From: "Tedeschi, Walfred" <walfred.tedeschi@intel.com>
To: Richard Henderson <rth@redhat.com>,
"gdb-patches@gcc.gnu.org" <gdb-patches@gcc.gnu.org>
Subject: RE: [PATCH 0/3] Support for x86 segments as address classes
Date: Tue, 19 Apr 2016 14:23:00 -0000 [thread overview]
Message-ID: <AC542571535E904D8E8ADAE745D60B19445B1BB8@IRSMSX104.ger.corp.intel.com> (raw)
In-Reply-To: <1446558190-13482-1-git-send-email-rth@redhat.com>
-----Original Message-----
From: gdb-patches-owner@sourceware.org [mailto:gdb-patches-owner@sourceware.org] On Behalf Of Richard Henderson
Sent: Tuesday, November 03, 2015 2:43 PM
To: gdb-patches@gcc.gnu.org
Subject: [PATCH 0/3] Support for x86 segments as address classes
The following gets 90% of the way there, but I'm stuck -- address_to_pointer and pointer_to_address do not appear to have access to a regcache. And not just in the one level of the caller, but significantly farther back in the call stack too.
Which begs the question of whether I've simply missed something in how to get hold of the current regcache?
r~
Richard Henderson (3):
Add amd64 registers fs_base and gs_base
Use register cache for x86_64 ps_get_thread_area
Segment support for x86_64, part 1
gdb/amd64-linux-nat.c | 107 ++++++++--------
gdb/amd64-linux-tdep.c | 5 +
gdb/amd64-linux-tdep.h | 2 +-
gdb/amd64-tdep.c | 68 ++++++++++
gdb/amd64-tdep.h | 6 +-
gdb/features/i386/64bit-seg.xml | 12 ++
gdb/features/i386/amd64-avx-linux.c | 36 +++---
gdb/features/i386/amd64-avx-linux.xml | 1 +
gdb/features/i386/amd64-avx512-linux.c | 192 +++++++++++++++--------------
gdb/features/i386/amd64-avx512-linux.xml | 1 +
gdb/features/i386/amd64-linux.c | 4 +
gdb/features/i386/amd64-linux.xml | 1 +
gdb/features/i386/amd64-mpx-linux.c | 48 ++++----
gdb/features/i386/amd64-mpx-linux.xml | 1 +
gdb/features/i386/x32-avx-linux.c | 36 +++---
gdb/features/i386/x32-avx-linux.xml | 1 +
gdb/features/i386/x32-avx512-linux.c | 192 +++++++++++++++--------------
gdb/features/i386/x32-avx512-linux.xml | 1 +
gdb/features/i386/x32-linux.c | 4 +
gdb/features/i386/x32-linux.xml | 1 +
gdb/regformats/i386/amd64-avx-linux.dat | 2 +
gdb/regformats/i386/amd64-avx512-linux.dat | 2 +
gdb/regformats/i386/amd64-linux.dat | 2 +
gdb/regformats/i386/amd64-mpx-linux.dat | 2 +
gdb/regformats/i386/x32-avx-linux.dat | 2 +
gdb/regformats/i386/x32-avx512-linux.dat | 2 +
gdb/regformats/i386/x32-linux.dat | 2 +
27 files changed, 438 insertions(+), 295 deletions(-) create mode 100644 gdb/features/i386/64bit-seg.xml
--
2.4.3
Richard,
I was about to prepare also a patch about the same topic.
Intention is to make fs_base and gs_base available for the user.
Have you gave up this patch, or have you found some road blocker?
Thanks and regard,
-Fred
Intel Deutschland GmbH
Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de
Managing Directors: Christin Eisenschmid, Christian Lamprechter
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928
next prev parent reply other threads:[~2016-04-19 14:23 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-03 13:43 Richard Henderson
2015-11-03 13:43 ` [PATCH 2/3] Use register cache for x86_64 ps_get_thread_area Richard Henderson
2015-11-03 13:44 ` [PATCH 3/3] Segment support for x86_64, part 1 Richard Henderson
2015-11-03 13:44 ` [PATCH 1/3] Add amd64 registers fs_base and gs_base Richard Henderson
2015-11-05 11:21 ` [PATCH 0/3] Support for x86 segments as address classes Pedro Alves
2015-11-05 14:15 ` Richard Henderson
2015-11-18 18:18 ` Ulrich Weigand
2015-11-05 14:18 ` [PATCH 4/3] Segment support for x86_64, part 2 Richard Henderson
2015-11-27 14:34 ` [PATCH 0/3] Support for x86 segments as address classes Gary Benson
2016-04-19 14:23 ` Tedeschi, Walfred [this message]
2016-04-19 14:44 ` Richard Henderson
2016-04-19 14:47 ` Walfred Tedeschi
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