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From: Yao Qi <qiyaoltc@gmail.com>
To: Antoine Tremblay <antoine.tremblay@ericsson.com>
Cc: <gdb-patches@sourceware.org>
Subject: Re: [PATCH v7.1] Support software single step on ARM in GDBServer.
Date: Fri, 11 Dec 2015 14:43:00 -0000	[thread overview]
Message-ID: <8637v9qc50.fsf@gmail.com> (raw)
In-Reply-To: <1449691701-11845-1-git-send-email-antoine.tremblay@ericsson.com>	(Antoine Tremblay's message of "Wed, 9 Dec 2015 15:08:21 -0500")

Antoine Tremblay <antoine.tremblay@ericsson.com> writes:

> +  /* Assume all atomic sequences start with a ldrex{,b,h,d} instruction.  */
> +  insn1 = self->ops->read_memory_unsigned_integer (loc, 2, byte_order_for_code);
> +
> +  loc += 2;
> +  if (thumb_insn_size (insn1) != 4)
> +    return NULL;
> +
> +  insn2 = self->ops->read_memory_unsigned_integer (loc, 2, byte_order_for_code);
> +

This line is too long, you may define a macro to shorten
"self->ops->read_memory_unsigned_integer".

> +  loc += 2;
> +  if (!((insn1 & 0xfff0) == 0xe850
> +        || ((insn1 & 0xfff0) == 0xe8d0 && (insn2 & 0x00c0) == 0x0040)))
> +    return NULL;
> +
> +  /* Assume that no atomic sequence is longer than "atomic_sequence_length"
> +     instructions.  */
> +  for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
> +    {
> +      insn1
> +	= self->ops->read_memory_unsigned_integer (loc, 2,byte_order_for_code);
> +      loc += 2;
> +
> +      if (thumb_insn_size (insn1) != 4)
> +	{
> +	  /* Assume that there is at most one conditional branch in the
> +	     atomic sequence.  If a conditional branch is found, put a
> +	     breakpoint in its destination address.  */
> +	  if ((insn1 & 0xf000) == 0xd000 && bits (insn1, 8, 11) != 0x0f)
> +	    {
> +	      if (last_breakpoint > 0)
> +		return NULL; /* More than one conditional branch found,
> +			     fallback to the standard code.  */
> +
> +	      breaks[1] = loc + 2 + (sbits (insn1, 0, 7) << 1);
> +	      last_breakpoint++;
> +	    }
> +
> +	  /* We do not support atomic sequences that use any *other*
> +	     instructions but conditional branches to change the PC.
> +	     Fall back to standard code to avoid losing control of
> +	     execution.  */
> +	  else if (thumb_instruction_changes_pc (insn1))
> +	    return NULL;
> +	}
> +      else
> +	{
> +	  insn2 = self->ops->read_memory_unsigned_integer
> +	    (loc, 2, byte_order_for_code);

Format looks wrong, multiple instances of this problem in the patch.

-- 
Yao (齐尧)


  parent reply	other threads:[~2015-12-11 14:43 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-08 14:07 [PATCH v7 0/8] Support software single step and conditional breakpoints " Antoine Tremblay
2015-12-08 14:07 ` [PATCH v7 1/8] Replace breakpoint_reinsert_addr by get_next_pcs operation " Antoine Tremblay
2015-12-08 14:07 ` [PATCH v7 5/8] Share regcache function regcache_raw_read_unsigned Antoine Tremblay
2015-12-08 14:07 ` [PATCH v7 3/8] Use xml-syscall to compare syscall numbers in arm_linux_sigreturn_return-addr Antoine Tremblay
2015-12-11 11:29   ` Yao Qi
2015-12-11 11:59     ` Pedro Alves
2015-12-11 12:02       ` Yao Qi
2015-12-11 12:05         ` Pedro Alves
2015-12-11 12:31           ` Antoine Tremblay
2015-12-11 12:47             ` Pedro Alves
2015-12-11 13:04               ` Antoine Tremblay
2015-12-11 13:20                 ` Pedro Alves
2015-12-11 13:25                   ` Antoine Tremblay
2015-12-15 12:46             ` Antoine Tremblay
2015-12-16 15:59               ` Pedro Alves
2015-12-16 16:36               ` Yao Qi
2015-12-16 16:37                 ` Antoine Tremblay
2015-12-11 12:29     ` Antoine Tremblay
2015-12-16 15:59       ` Pedro Alves
2015-12-16 16:05         ` Antoine Tremblay
2015-12-16 16:24           ` [PATCH v7.1 " Antoine Tremblay
2015-12-17 10:09             ` Yao Qi
2015-12-17 10:17             ` Pedro Alves
2015-12-17 12:51               ` Antoine Tremblay
2015-12-17 13:25                 ` Yao Qi
2015-12-17 13:36                   ` Antoine Tremblay
2015-12-08 14:07 ` [PATCH v7 2/8] Share some ARM target dependent code from GDB with GDBServer Antoine Tremblay
2015-12-08 14:07 ` [PATCH v7 4/8] Refactor arm_software_single_step to use regcache Antoine Tremblay
2015-12-11 11:37   ` Yao Qi
2015-12-11 12:41     ` Antoine Tremblay
2015-12-08 14:08 ` [PATCH v7 7/8] Enable software single stepping for while-stepping actions in GDBServer Antoine Tremblay
2015-12-08 14:08 ` [PATCH v7 8/8] Enable conditional breakpoints for targets that support software single step " Antoine Tremblay
2015-12-08 14:08 ` [PATCH v7 6/8] Support software single step on ARM " Antoine Tremblay
2015-12-09 20:09   ` [PATCH v7.1] " Antoine Tremblay
2015-12-11 13:28     ` Yao Qi
2015-12-11 13:36       ` Antoine Tremblay
2015-12-11 13:41         ` Antoine Tremblay
2015-12-11 14:45           ` Yao Qi
2015-12-11 14:43     ` Yao Qi [this message]
2015-12-11 15:06       ` Antoine Tremblay
2015-12-11 15:26         ` Antoine Tremblay
2015-12-11 15:38         ` Yao Qi
2015-12-11 16:11           ` Antoine Tremblay
2015-12-11 16:26             ` [PATCH v7.2] " Antoine Tremblay
2015-12-11 17:28               ` Yao Qi
2015-12-11 17:52                 ` Antoine Tremblay
2015-12-10 15:59 ` [PATCH v7 0/8] Support software single step and conditional breakpoints " Yao Qi
2015-12-10 16:02   ` Antoine Tremblay

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