[patch, simulator, mips] Add rdhwr instruction to mips simulator

[patch, simulator, mips] Add rdhwr instruction to mips simulator

[Steve Ellcey]

While testing GCC with the mips-mti-elf target and using the GNU simulator
I noticed that some tests (like gcc.dg/builtins-64.c) were failing on mips32r2
with synci enabled.  This is because the rdhwr instruction was not implemented
in the simulator.

This patch (created by Chao-ying and tested by me) adds the rdhwr instruction
to the mips simulator and fixes the gcc.dg/builtins-64.c failure.

OK to checkin?

Steve Ellcey
sellcey@mips.com




2012-10-04  Chao-ying Fu  <fu@mips.com>
	    Steve Ellcey  <sellcey@mips.com>

	* mips/mips3264r2.igen (rdhwr): New.


diff --git a/sim/mips/mips3264r2.igen b/sim/mips/mips3264r2.igen
index c52ec3b..e0b6d5b 100644
--- a/sim/mips/mips3264r2.igen
+++ b/sim/mips/mips3264r2.igen
@@ -241,6 +241,17 @@
 }
 
 
+011111,00000,5.RT,5.RD,00000,111011::32::RDHWR
+"rdhwr r<RT>, r<RD>"
+*mips32r2:
+*mips64r2:
+{
+  // Return 0 for all hardware registers currently
+  GPR[RT] = EXTEND32 (0);
+  TRACE_ALU_RESULT1 (GPR[RT]);
+}
+
+
 011111,00000,5.RT,5.RD,00010,100000::32::WSBH
 "wsbh r<RD>, r<RT>"
 *mips32r2:

Re: [patch, simulator, mips] Add rdhwr instruction to mips simulator

[Mike Frysinger]

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On Wednesday 03 October 2012 15:34:18 Steve Ellcey wrote:
> This patch (created by Chao-ying and tested by me) adds the rdhwr
> instruction to the mips simulator and fixes the gcc.dg/builtins-64.c
> failure.
> 
> OK to checkin?

we don't have a mips/sim maintainer atm, so OK

> --- a/sim/mips/mips3264r2.igen
> +++ b/sim/mips/mips3264r2.igen
> 
> +011111,00000,5.RT,5.RD,00000,111011::32::RDHWR
> +"rdhwr r<RT>, r<RD>"
> +*mips32r2:
> +*mips64r2:
> +{
> +  // Return 0 for all hardware registers currently

we don't use // comments, but it looks like all of the mips igen files suffer 
from this, so that would be something to fix independently.
-mike

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