From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7422 invoked by alias); 3 Oct 2012 19:34:49 -0000 Received: (qmail 7267 invoked by uid 22791); 3 Oct 2012 19:34:48 -0000 X-SWARE-Spam-Status: No, hits=-3.3 required=5.0 tests=AWL,BAYES_00,KHOP_SPAMHAUS_DROP,RP_MATCHES_RCVD,TW_DH X-Spam-Check-By: sourceware.org Received: from dns1.mips.com (HELO dns1.mips.com) (12.201.5.69) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 03 Oct 2012 19:34:40 +0000 Received: from mailgate1.mips.com (mailgate1.mips.com [12.201.5.111]) by dns1.mips.com (8.13.8/8.13.8) with ESMTP id q93JYTP6019899 for ; Wed, 3 Oct 2012 12:34:32 -0700 X-M-MSG: Received: from exchdb01.mips.com (unknown [192.168.36.84]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by mailgate1.mips.com (Postfix) with ESMTP id 2E3B2364643 for ; Wed, 3 Oct 2012 12:34:23 -0700 (PDT) Received: from ubuntu-sellcey.mips.com (192.168.65.53) by exchhub01.mips.com (192.168.36.84) with Microsoft SMTP Server id 14.1.270.1; Wed, 3 Oct 2012 12:34:18 -0700 Received: by ubuntu-sellcey.mips.com (sSMTP sendmail emulation); Wed, 03 Oct 2012 12:34:18 -0700 From: "Steve Ellcey " Date: Wed, 03 Oct 2012 19:34:00 -0000 To: CC: Subject: [patch, simulator, mips] Add rdhwr instruction to mips simulator User-Agent: Heirloom mailx 12.4 7/29/08 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Message-ID: <78a2b827-659d-4690-a1e8-797217096b9f@EXCHHUB01.MIPS.com> X-EMS-Proccessed: 6LP3oGfGVdcdb8o1aBnt6w== X-EMS-STAMP: M1s6Qev7pI0P/KU5c5KdRQ== Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2012-10/txt/msg00046.txt.bz2 While testing GCC with the mips-mti-elf target and using the GNU simulator I noticed that some tests (like gcc.dg/builtins-64.c) were failing on mips32r2 with synci enabled. This is because the rdhwr instruction was not implemented in the simulator. This patch (created by Chao-ying and tested by me) adds the rdhwr instruction to the mips simulator and fixes the gcc.dg/builtins-64.c failure. OK to checkin? Steve Ellcey sellcey@mips.com 2012-10-04 Chao-ying Fu Steve Ellcey * mips/mips3264r2.igen (rdhwr): New. diff --git a/sim/mips/mips3264r2.igen b/sim/mips/mips3264r2.igen index c52ec3b..e0b6d5b 100644 --- a/sim/mips/mips3264r2.igen +++ b/sim/mips/mips3264r2.igen @@ -241,6 +241,17 @@ } +011111,00000,5.RT,5.RD,00000,111011::32::RDHWR +"rdhwr r, r" +*mips32r2: +*mips64r2: +{ + // Return 0 for all hardware registers currently + GPR[RT] = EXTEND32 (0); + TRACE_ALU_RESULT1 (GPR[RT]); +} + + 011111,00000,5.RT,5.RD,00010,100000::32::WSBH "wsbh r, r" *mips32r2: