Re: [SH] Check FPSCR.PR for fldi0, fldi1 insns in simulator

[Simon Marchi <simark@simark.ca>]

On 2026-03-10 23:02, Oleg Endo wrote:
> Hi,
> 
> On SH variants with double-precision FPU the insns fli0 and flid1 require
> that FPSCR.PR must be set to 0, i.e. single-precision mode.  The attached
> patch fixes that.
> 
> OK to apply?
> 
> Best regards,
> Oleg Endo

I looked for an ISA manual [1] and checked it for fun.  For the FLID0,
it says:

  When FPSCR.PR = 0, this instruction loads floating-point 0.0 (0x00000000) into FRn.

Curiously, it does not say what happens if `FPSCR.PR = 1`.  However,
the description for FPSCR.PR says:

  PR: Precision mode
  PR = 0: Floating-point instructions are executed as single-precision operations.
  PR = 1: Floating-point instructions are executed as double-precision operations (the result of
  instructions for which double-precision is not supported is undefined).

I guess that FLID0 and FLID1 fall into that "is undefined" category?
Do you know what the real hardware does in this case?

The patch LGTM, but I am not a maintainer of the sim, so:

Reviewed-By: Simon Marchi <simon.marchi@efficios.com>

One note, please put the relevant information (the body of your email)
into the commit log itself).

Thanks,

Simon

[1] https://0x04.net/~mwk/doc/sh/e602156_sh4.pdf