From: Luis Machado <lgustavo@codesourcery.com>
To: "'gdb-patches@sourceware.org'" <gdb-patches@sourceware.org>,
Yao Qi <yao@codesourcery.com>
Subject: Re: [PATCH, v2] Fix ARM machine state testcase failures
Date: Tue, 21 Oct 2014 12:16:00 -0000 [thread overview]
Message-ID: <54464E8D.8030503@codesourcery.com> (raw)
In-Reply-To: <54464B82.6030703@codesourcery.com>
On 10/21/2014 10:03 AM, Luis Machado wrote:
> - if (bit (arm_insn_r->arm_insn, 20) && !bit (arm_insn_r->arm_insn, 22))
> - {
> - register_bits = bits (arm_insn_r->arm_insn, 0, 15);
> - no_of_regs = 15;
> - }
> - else
> - {
> - register_bits = bits (arm_insn_r->arm_insn, 0, 14);
> - no_of_regs = 14;
> - }
Forgot to mention. I saw this bit of code but did not find signs of
these patterns in the documentation i have access to. I suppose it may
be some older encoding of the instructions (26-bit)?
The comments don't really make it clear enough. If someone knows more
about this distinction, please do share the details.
Luis
next prev parent reply other threads:[~2014-10-21 12:16 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-21 12:03 Luis Machado
2014-10-21 12:16 ` Luis Machado [this message]
2014-10-21 12:49 ` Yao Qi
2014-10-21 13:07 ` Yao Qi
2014-10-22 0:52 ` Luis Machado
2014-10-27 11:03 ` Luis Machado
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