From: Yao Qi <yao@codesourcery.com>
To: Ulrich Weigand <uweigand@de.ibm.com>
Cc: gdb-patches@sourceware.org
Subject: Re: [try 2nd 5/8] Displaced stepping for Thumb 32-bit insns
Date: Mon, 23 May 2011 11:32:00 -0000 [thread overview]
Message-ID: <4DDA450E.8080205@codesourcery.com> (raw)
In-Reply-To: <201105171714.p4HHEBTp018414@d06av02.portsmouth.uk.ibm.com>
On 05/18/2011 01:14 AM, Ulrich Weigand wrote:
>> > +static int
>> > +thumb2_copy_copro_load_store (struct gdbarch *gdbarch, uint16_t insn1,
>> > + uint16_t insn2, struct regcache *regs,
>> > + struct displaced_step_closure *dsc)
>> > +{
>> > + unsigned int rn = bits (insn1, 0, 3);
>> > +
>> > + if (rn == ARM_PC_REGNUM)
>> > + return thumb_copy_unmodified_32bit (gdbarch, insn1, insn2,
>> > + "copro load/store", dsc);
>> > +
>> > + if (debug_displaced)
>> > + fprintf_unfiltered (gdb_stdlog, "displaced: copying coprocessor "
>> > + "load/store insn %.4x%.4x\n", insn1, insn2);
>> > +
>> > + dsc->modinsn[0] = insn1 & 0xfff0;
>> > + dsc->modinsn[1] = insn2;
>> > + dsc->numinsns = 2;
> This doesn't look right: you're replacing the RN register if it is anything
> *but* 15 -- but those cases do not need to be replaced!
>
Sorry, the condition check should be reversed.
> In fact, unless I'm missing something, in Thumb mode no coprocessor
> instruction actually uses the PC (either RN == 15 indicates some other
> operation, or else it is specified as unpredictable). So those should
> simply all be copied unmodified ...
>
I can understand almost of your comments except this one. I think you
are right, but there are still some cases that PC is used in this
category of instructions.
thumb2_copy_copro_load_store covers instructions STC/STC2, VLDR/VSTR and
LDC/LDC2 (literal and immediate). I re-read ARM ARM again, and find that,
STC/STC2 doesn't use PC. ARM ARM said "if n == 15 && (wback ||
CurrentInstrSet() != InstrSet_ARM) then UNPREDICTABLE;"
VSTR doesn't use PC. ARM ARM said "if n == 15 && CurrentInstrSet() !=
InstrSet_ARM then UNPREDICTABLE;"
However, LDC/LDC2/VLDR can use PC.
VLDR<c><q>{.32} <Sd>, [PC, #+/-<imm>]
LDC, LDC2 (literal or immediate)
LDC{L}<c> <coproc>,<CRd>,[PC],<option>
I can write a real VLDR instruction using PC successfully. Still no
luck to fix 'Illegal instruction' when running program having LDC/LDC2
using PC register, but I think LDC/LDC2 should be able to use PC
register. Am I missing something here?
--
Yao (é½å°§)
next prev parent reply other threads:[~2011-05-23 11:32 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-25 14:17 [patch 0/3] Displaced stepping for 16-bit Thumb instructions Yao Qi
2010-12-25 14:22 ` [patch 1/3] " Yao Qi
2011-02-17 19:09 ` Ulrich Weigand
2010-12-25 17:09 ` [patch 2/3] " Yao Qi
2011-02-17 19:46 ` Ulrich Weigand
2011-02-18 6:33 ` Yao Qi
2011-02-18 12:18 ` Ulrich Weigand
2011-02-21 7:41 ` Yao Qi
2011-02-21 20:14 ` Ulrich Weigand
2011-02-25 18:09 ` Yao Qi
2011-02-25 20:17 ` Ulrich Weigand
2011-02-26 14:07 ` Yao Qi
2011-02-28 17:37 ` Ulrich Weigand
2011-03-01 9:01 ` Yao Qi
2011-03-01 16:11 ` Ulrich Weigand
2010-12-25 17:54 ` [patch 3/3] " Yao Qi
2010-12-27 15:15 ` Yao Qi
2011-02-17 20:55 ` Ulrich Weigand
2011-02-18 7:30 ` Yao Qi
2011-02-18 13:25 ` Ulrich Weigand
2011-02-28 2:04 ` Displaced stepping 0003: " Yao Qi
2010-12-29 5:48 ` [patch 0/3] Displaced stepping " Yao Qi
2011-01-13 12:38 ` Yao Qi
2011-02-10 6:48 ` Ping 2 " Yao Qi
2011-02-26 17:50 ` Displaced stepping 0002: refactor and create some copy helpers Yao Qi
2011-02-28 17:53 ` Ulrich Weigand
2011-02-28 2:15 ` Displaced stepping 0004: wip: 32-bit Thumb instructions Yao Qi
2011-03-24 13:49 ` [try 2nd 0/8] Displaced stepping for " Yao Qi
2011-03-24 13:56 ` [try 2nd 1/8] Fix cleanup_branch to take Thumb into account Yao Qi
2011-04-06 20:46 ` Ulrich Weigand
2011-04-07 3:45 ` Yao Qi
2011-03-24 13:58 ` [try 2nd 2/8] Rename copy_* functions to arm_copy_* Yao Qi
2011-04-06 20:51 ` Ulrich Weigand
2011-04-07 8:02 ` Yao Qi
2011-04-19 9:07 ` Yao Qi
2011-04-26 17:09 ` Ulrich Weigand
2011-04-27 10:27 ` Yao Qi
2011-04-27 13:32 ` Ulrich Weigand
2011-04-28 5:05 ` Yao Qi
2011-03-24 14:01 ` [try 2nd 3/8] Refactor copy_svc_os Yao Qi
2011-04-06 20:55 ` Ulrich Weigand
2011-04-07 4:19 ` Yao Qi
2011-03-24 14:05 ` [try 2nd 5/8] Displaced stepping for Thumb 32-bit insns Yao Qi
2011-05-05 13:25 ` Yao Qi
2011-05-17 17:14 ` Ulrich Weigand
2011-05-23 11:32 ` Yao Qi
2011-05-27 22:11 ` Ulrich Weigand
2011-05-23 11:32 ` Yao Qi [this message]
2011-07-06 10:55 ` Yao Qi
2011-07-15 19:57 ` Ulrich Weigand
2011-07-18 9:26 ` Yao Qi
2011-03-24 14:05 ` [try 2nd 4/8] Displaced stepping for Thumb 16-bit insn Yao Qi
2011-05-05 13:24 ` Yao Qi
2011-05-10 13:58 ` Ulrich Weigand
2011-05-11 13:06 ` Yao Qi
2011-05-16 17:19 ` Ulrich Weigand
2011-05-17 14:29 ` Yao Qi
2011-05-17 17:20 ` Ulrich Weigand
2011-03-24 14:06 ` [try 2nd 6/8] Rename some functions to arm_* Yao Qi
2011-04-06 20:52 ` Ulrich Weigand
2011-04-07 4:26 ` Yao Qi
2011-03-24 14:11 ` [try 2nd 7/8] Test case Yao Qi
2011-05-05 13:26 ` Yao Qi
2011-05-11 13:15 ` [try 2nd 7/8] Test case: V3 Yao Qi
2011-05-17 17:24 ` Ulrich Weigand
2011-03-24 15:14 ` [try 2nd 8/8] NEWS Yao Qi
[not found] <201107151847.p6FIlJNm001180@d06av02.portsmouth.uk.ibm.com>
2011-08-06 4:32 ` [try 2nd 5/8] Displaced stepping for Thumb 32-bit insns Yao Qi
2011-08-09 18:46 ` Ulrich Weigand
2011-08-19 3:13 ` Yao Qi
2011-08-19 16:39 ` Ulrich Weigand
2011-08-30 15:53 ` Yao Qi
2011-09-14 14:25 ` Ulrich Weigand
2011-10-09 13:28 ` Yao Qi
2011-10-10 14:40 ` Ulrich Weigand
2011-10-10 1:41 ` Yao Qi
2011-10-10 14:39 ` Ulrich Weigand
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