Re: [try 2nd 5/8] Displaced stepping for Thumb 32-bit insns

["Ulrich Weigand" <uweigand@de.ibm.com>]

Yao Qi wrote:

>          Support displaced stepping for Thumb 32-bit insns.
> 
>          * arm-tdep.c (thumb_copy_unmodified_32bit): New.
>          (thumb2_copy_preload): New.
>          (thumb2_copy_copro_load_store): New.
>          (thumb2_copy_b_bl_blx): New.
>          (thumb2_copy_alu_imm): New.
>          (thumb2_copy_load_reg_imm): New.
>          (thumb2_copy_load_literal): New
>          (thumb2_copy_block_xfer): New.
>          (thumb_32bit_copy_undef): New.
>          (thumb_32bit_copy_unpred): New.
>          (thumb2_decode_ext_reg_ld_st): New.
>          (thumb2_decode_svc_copro): New.
>          (decode_thumb_32bit_store_single_data_item): New.
>          (thumb_copy_pc_relative_32bit): New.
>          (thumb_decode_pc_relative_32bit): New.
>          (decode_thumb_32bit_ld_mem_hints): New.
>          (thumb2_copy_table_branch): New
>          (thumb_process_displaced_32bit_insn): Process Thumb 32-bit
>          instructions.

I'm not finding any more bugs :-)

Just a couple of cosmetic issues:

> +  /* PC is only allowed to use in PLI (immeidate,literal) Encoding T3, and
Typo: immediate

> +    case 1: /* Load halfword and memory hints.  */
> +      if (rt == 0xf) /* PLD{W} and Unalloc memory hint.  */
> +	return thumb_copy_unmodified_32bit (gdbarch, insn1, insn2,
> +					    "pld/unalloc memhint", dsc);
> +      else
> +	{
> +	  int insn2_bit_8_11 = bits (insn2, 8, 11);
This is now unused.


Since this is (together with the previous patches that are not yet committed)
is a significant change, I'm wondering a bit what additional testing we could
do to catch any possibly remaining issues ...

Did you try a testsuite run with a GDB build that forces displaced-stepping
on by default?  (I.e. change the initializer of can_use_displaced_stepping
in infrun.c to can_use_displaced_stepping_on.)  That would exercise the new
code a lot.


Thanks,
Ulrich

-- 
  Dr. Ulrich Weigand
  GNU Toolchain for Linux on System z and Cell BE
  Ulrich.Weigand@de.ibm.com