From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13812 invoked by alias); 19 Aug 2011 16:39:43 -0000 Received: (qmail 13791 invoked by uid 22791); 19 Aug 2011 16:39:42 -0000 X-SWARE-Spam-Status: No, hits=-2.2 required=5.0 tests=AWL,BAYES_00,MSGID_FROM_MTA_HEADER,RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mtagate7.uk.ibm.com (HELO mtagate7.uk.ibm.com) (194.196.100.167) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 19 Aug 2011 16:39:24 +0000 Received: from d06nrmr1707.portsmouth.uk.ibm.com (d06nrmr1707.portsmouth.uk.ibm.com [9.149.39.225]) by mtagate7.uk.ibm.com (8.13.1/8.13.1) with ESMTP id p7JGdEdZ017161 for ; Fri, 19 Aug 2011 16:39:14 GMT Received: from d06av02.portsmouth.uk.ibm.com (d06av02.portsmouth.uk.ibm.com [9.149.37.228]) by d06nrmr1707.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id p7JGdE4B2490420 for ; Fri, 19 Aug 2011 17:39:14 +0100 Received: from d06av02.portsmouth.uk.ibm.com (loopback [127.0.0.1]) by d06av02.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id p7JGdEfO007862 for ; Fri, 19 Aug 2011 10:39:14 -0600 Received: from tuxmaker.boeblingen.de.ibm.com (tuxmaker.boeblingen.de.ibm.com [9.152.85.9]) by d06av02.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with SMTP id p7JGdC8H007859; Fri, 19 Aug 2011 10:39:12 -0600 Message-Id: <201108191639.p7JGdC8H007859@d06av02.portsmouth.uk.ibm.com> Received: by tuxmaker.boeblingen.de.ibm.com (sSMTP sendmail emulation); Fri, 19 Aug 2011 18:39:12 +0200 Subject: Re: [try 2nd 5/8] Displaced stepping for Thumb 32-bit insns To: yao@codesourcery.com (Yao Qi) Date: Fri, 19 Aug 2011 16:39:00 -0000 From: "Ulrich Weigand" Cc: gdb-patches@sourceware.org (gdb-patches@sourceware.org) In-Reply-To: <4E4DD4C6.9060700@codesourcery.com> from "Yao Qi" at Aug 19, 2011 11:13:10 AM MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2011-08/txt/msg00374.txt.bz2 Yao Qi wrote: > Support displaced stepping for Thumb 32-bit insns. > > * arm-tdep.c (thumb_copy_unmodified_32bit): New. > (thumb2_copy_preload): New. > (thumb2_copy_copro_load_store): New. > (thumb2_copy_b_bl_blx): New. > (thumb2_copy_alu_imm): New. > (thumb2_copy_load_reg_imm): New. > (thumb2_copy_load_literal): New > (thumb2_copy_block_xfer): New. > (thumb_32bit_copy_undef): New. > (thumb_32bit_copy_unpred): New. > (thumb2_decode_ext_reg_ld_st): New. > (thumb2_decode_svc_copro): New. > (decode_thumb_32bit_store_single_data_item): New. > (thumb_copy_pc_relative_32bit): New. > (thumb_decode_pc_relative_32bit): New. > (decode_thumb_32bit_ld_mem_hints): New. > (thumb2_copy_table_branch): New > (thumb_process_displaced_32bit_insn): Process Thumb 32-bit > instructions. I'm not finding any more bugs :-) Just a couple of cosmetic issues: > + /* PC is only allowed to use in PLI (immeidate,literal) Encoding T3, and Typo: immediate > + case 1: /* Load halfword and memory hints. */ > + if (rt == 0xf) /* PLD{W} and Unalloc memory hint. */ > + return thumb_copy_unmodified_32bit (gdbarch, insn1, insn2, > + "pld/unalloc memhint", dsc); > + else > + { > + int insn2_bit_8_11 = bits (insn2, 8, 11); This is now unused. Since this is (together with the previous patches that are not yet committed) is a significant change, I'm wondering a bit what additional testing we could do to catch any possibly remaining issues ... Did you try a testsuite run with a GDB build that forces displaced-stepping on by default? (I.e. change the initializer of can_use_displaced_stepping in infrun.c to can_use_displaced_stepping_on.) That would exercise the new code a lot. Thanks, Ulrich -- Dr. Ulrich Weigand GNU Toolchain for Linux on System z and Cell BE Ulrich.Weigand@de.ibm.com