From: Luis <luis.machado.foss@gmail.com>
To: srinath.parvathaneni@arm.com, gdb-patches@sourceware.org
Cc: guinevere@redhat.com, thiago.bauermann@linaro.org,
Ezra.Sitorus@arm.com, Matthieu.Longo@arm.com, simark@simark.ca
Subject: Re: [PATCH v3 2/5] [PATCH 2/5] gdb: Improve SIGSEGV diagnostics for POE faults
Date: Tue, 21 Jul 2026 21:30:09 +0100 [thread overview]
Message-ID: <3ae1161e-bc58-4cc4-a71d-c12b5b62d611@gmail.com> (raw)
In-Reply-To: <20260714201530.78374-3-srinath.parvathaneni@arm.com>
On 14/07/2026 21:15, srinath.parvathaneni@arm.com wrote:
> From: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
>
> When a SIGSEGV is caused by a Permission Overlay violation, include
> additional information in GDB's error message to help identify the
> failing address along with the responsible protection key causing
> this fault.
>
> Example:
> (gdb) c
> Continuing.
>
> Program received signal SIGSEGV, Segmentation fault
> Protection Key Violation while accessing address 0x0000fffff7ff3000 with Protection Key = 1.
> 0x0000aaaaaaaa0a3c in main () at poe_sigsegv.c:26
>
> Approved-by: Thiago Jung Bauermann <thiago.bauermann@linaro.org>
> ---
> gdb/aarch64-linux-tdep.c | 21 ++++++++++++++++++---
> 1 file changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/gdb/aarch64-linux-tdep.c b/gdb/aarch64-linux-tdep.c
> index f11eccc1bc1..b8a02ab9972 100644
> --- a/gdb/aarch64-linux-tdep.c
> +++ b/gdb/aarch64-linux-tdep.c
> @@ -53,6 +53,7 @@
>
> #include "arch/aarch64-fpmr-linux.h"
> #include "arch/aarch64-gcs-linux.h"
> +#include "arch/aarch64-poe-linux.h"
> #include "arch/aarch64-mte.h"
> #include "arch/aarch64-mte-linux.h"
> #include "arch/aarch64-pauth-linux.h"
> @@ -2675,11 +2676,12 @@ aarch64_linux_report_signal_info (struct gdbarch *gdbarch,
> {
> aarch64_gdbarch_tdep *tdep = gdbarch_tdep<aarch64_gdbarch_tdep> (gdbarch);
>
> - if (!(tdep->has_mte () || tdep->has_gcs ()) || siggnal != GDB_SIGNAL_SEGV)
> + if (!(tdep->has_mte () || tdep->has_gcs () || tdep->has_poe ())
> + || siggnal != GDB_SIGNAL_SEGV)
> return;
>
> CORE_ADDR fault_addr = 0;
> - long si_code = 0, si_errno = 0;
> + long si_code = 0, si_errno = 0, si_pkey = -1;
>
> try
> {
> @@ -2687,6 +2689,9 @@ aarch64_linux_report_signal_info (struct gdbarch *gdbarch,
> violation. */
> si_code = parse_and_eval_long ("$_siginfo.si_code");
> si_errno = parse_and_eval_long ("$_siginfo.si_errno");
> + if (tdep->has_poe ())
> + si_pkey = parse_and_eval_long
> + ("$_siginfo._sifields._sigfault._._addr_pkey.si_pkey");
>
> fault_addr
> = parse_and_eval_long ("$_siginfo._sifields._sigfault.si_addr");
> @@ -2703,6 +2708,8 @@ aarch64_linux_report_signal_info (struct gdbarch *gdbarch,
> meaning = _("Memory tag violation");
> else if (si_code == AARCH64_SEGV_CPERR && si_errno == 0)
> meaning = _("Guarded Control Stack error");
> + else if (si_code == AARCH64_SEGV_PKUERR)
> + meaning = _("Protection Key Violation");
> else
> return;
>
> @@ -2734,6 +2741,14 @@ aarch64_linux_report_signal_info (struct gdbarch *gdbarch,
> uiout->field_string ("logical-tag", hex_string (ltag));
> }
> }
> + /* For POE SEGSEGV, show additional information. */
Is this really supposed to be POE SEGSEGV or is it a typo?
> + else if (si_code == AARCH64_SEGV_PKUERR)
> + {
> + uiout->text (_(" while accessing address "));
> + uiout->field_core_addr ("fault-addr", gdbarch, fault_addr);
> + uiout->text (" with Protection Key = ");
Missing internationalization above.
> + uiout->field_signed ("protection-key", si_pkey);
> + }
> else if (si_code != AARCH64_SEGV_CPERR)
> {
> uiout->text ("\n");
> @@ -3054,7 +3069,7 @@ aarch64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
> aarch64_linux_decode_memtag_section);
> }
>
> - if (tdep->has_mte () || tdep->has_gcs ())
> + if (tdep->has_mte () || tdep->has_gcs () || tdep->has_poe ())
> set_gdbarch_report_signal_info (gdbarch, aarch64_linux_report_signal_info);
>
> /* Initialize the aarch64_linux_record_tdep. */
next prev parent reply other threads:[~2026-07-21 20:32 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-14 20:15 [PATCH v3 0/5] gdb/aarch64: Add POR_EL0 register support for FEAT_S1POE srinath.parvathaneni
2026-07-14 20:15 ` [PATCH v3 1/5] [PATCH 1/5] " srinath.parvathaneni
2026-07-21 19:53 ` Luis
2026-07-25 6:20 ` Thiago Jung Bauermann
2026-07-25 7:37 ` Luis
2026-07-25 18:44 ` Thiago Jung Bauermann
2026-07-21 20:25 ` Luis
2026-07-23 9:29 ` Srinath Parvathaneni
2026-07-25 6:13 ` Thiago Jung Bauermann
2026-07-25 7:29 ` Luis
2026-07-14 20:15 ` [PATCH v3 2/5] [PATCH 2/5] gdb: Improve SIGSEGV diagnostics for POE faults srinath.parvathaneni
2026-07-21 20:30 ` Luis [this message]
2026-07-22 9:41 ` Matthieu Longo
2026-07-22 23:11 ` Luis
2026-07-23 9:03 ` Srinath Parvathaneni
2026-07-25 7:39 ` Luis
2026-07-14 20:15 ` [PATCH v3 3/5] [PATCH 3/5] gdbserver/aarch64: Add POR_EL0 register support srinath.parvathaneni
2026-07-14 20:15 ` [PATCH v3 4/5] [PATCH 4/5] gdb/aarch64: Add core file support for FEAT_S1POE srinath.parvathaneni
2026-07-21 20:14 ` Luis
2026-07-14 20:15 ` [PATCH v3 5/5] [PATCH 5/5] gdb/testsuite: Add FEAT_S1POE testcases srinath.parvathaneni
2026-07-21 20:38 ` Luis
2026-07-25 6:23 ` Thiago Jung Bauermann
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