From: Tsukasa OI via Gdb-patches <gdb-patches@sourceware.org>
To: Tsukasa OI <research_trasio@irq.a4lg.com>
Cc: gdb-patches@sourceware.org
Subject: [PING^1 PATCH 1/1] sim/riscv: Fix RISC-V multiply instructions on the simulator
Date: Wed, 14 Sep 2022 10:55:51 +0000 [thread overview]
Message-ID: <21f573ea4f45dabe96918adb8ded280774aef1ed.1663152886.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1663152886.git.research_trasio@irq.a4lg.com>
Because of recent 'Zmmul' support, the simulator is broken. This is caused
by instruction classification changes:
[Before]
- INSN_CLASS_M : multiply / divide
[After Zmmul]
- INSN_CLASS_M : divide
- INSN_CLASS_ZMMUL : multiply
The simulator checks the instruction class to execute an instruction:
- INSN_CLASS_I : 'I'
- INSN_CLASS_M : 'M' (multiply / divide)
- INSN_CLASS_A : 'A'
'Zmmul' moved multiply instructions to INSN_CLASS_ZMMUL and that instruction
class is not handled by the simulator.
This commit handles INSN_CLASS_ZMMUL for all 'M' instructions and adds a
testcase to test all RV32M instructions run without any faults.
sim/ChangeLog:
* riscv/sim-main.c (execute_one): Add INSN_CLASS_ZMMUL
to run multiply instructions correctly.
* testsuite/riscv/m-ext.s: New test.
---
sim/riscv/sim-main.c | 1 +
sim/testsuite/riscv/m-ext.s | 18 ++++++++++++++++++
2 files changed, 19 insertions(+)
create mode 100644 sim/testsuite/riscv/m-ext.s
diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
index 30d2f1e1c9a..0156f791d4b 100644
--- a/sim/riscv/sim-main.c
+++ b/sim/riscv/sim-main.c
@@ -936,6 +936,7 @@ execute_one (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
case INSN_CLASS_I:
return execute_i (cpu, iw, op);
case INSN_CLASS_M:
+ case INSN_CLASS_ZMMUL:
return execute_m (cpu, iw, op);
default:
TRACE_INSN (cpu, "UNHANDLED EXTENSION: %d", op->insn_class);
diff --git a/sim/testsuite/riscv/m-ext.s b/sim/testsuite/riscv/m-ext.s
new file mode 100644
index 00000000000..b85397a32a0
--- /dev/null
+++ b/sim/testsuite/riscv/m-ext.s
@@ -0,0 +1,18 @@
+# check that the RV32M instructions run without any fault.
+# mach: riscv
+
+.include "testutils.inc"
+
+ start
+
+ .option arch, +m
+ mul x0, x1, x2
+ mulh x0, x1, x2
+ mulhu x0, x1, x2
+ mulhsu x0, x1, x2
+ div x0, x1, x2
+ divu x0, x1, x2
+ rem x0, x1, x2
+ remu x0, x1, x2
+
+ pass
--
2.34.1
next prev parent reply other threads:[~2022-09-14 10:56 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1657793406.git.research_trasio@irq.a4lg.com>
2022-08-09 3:37 ` [PATCH v4 0/3] RISC-V: Add 'Zmmul' extension Tsukasa OI via Gdb-patches
2022-08-09 3:37 ` [PATCH v4 1/3] RISC-V: Add 'M' extension testcases Tsukasa OI via Gdb-patches
2022-08-09 3:37 ` [PATCH v4 2/3] RISC-V: Add 'Zmmul' extension Tsukasa OI via Gdb-patches
2022-08-09 3:37 ` [PATCH v4 3/3] RISC-V: Add 'Zmmul' failure testcases Tsukasa OI via Gdb-patches
2022-08-29 1:58 ` [PATCH v5 0/3] RISC-V: Add 'Zmmul' extension Tsukasa OI via Gdb-patches
2022-08-29 1:58 ` [PATCH v5 1/3] RISC-V: Add 'M' extension testcases Tsukasa OI via Gdb-patches
2022-08-29 1:58 ` [PATCH v5 2/3] RISC-V: Add 'Zmmul' extension Tsukasa OI via Gdb-patches
2022-08-29 1:58 ` [PATCH v5 3/3] RISC-V: Add 'Zmmul' failure testcases Tsukasa OI via Gdb-patches
2022-08-30 9:55 ` [PATCH v5 0/3] RISC-V: Add 'Zmmul' extension Nelson Chu
2022-09-01 7:47 ` Tsukasa OI via Gdb-patches
2022-08-31 1:46 ` [PATCH 0/1] sim: Fix RISC-V multiply instructions on simulator Tsukasa OI via Gdb-patches
2022-08-31 1:46 ` [PATCH 1/1] " Tsukasa OI via Gdb-patches
2022-09-14 10:55 ` [PING^1 PATCH 0/1] " Tsukasa OI via Gdb-patches
2022-09-14 10:55 ` Tsukasa OI via Gdb-patches [this message]
2022-09-21 16:01 ` [PING^2 PATCH 0/1] sim/riscv: Fix broken RISC-V simulater after implementing 'Zmmul' Tsukasa OI via Gdb-patches
2022-09-21 16:01 ` [PING^2 PATCH 1/1] sim/riscv: Fix RISC-V multiply instructions on the simulator Tsukasa OI via Gdb-patches
2022-10-06 10:32 ` [PING^3 PATCH 0/1] sim/riscv: PR29595, Fix broken RISC-V simulater after implementing 'Zmmul' Tsukasa OI via Gdb-patches
2022-10-06 10:33 ` [PING^3 PATCH 1/1] sim/riscv: PR29595, Fix multiply instructions Tsukasa OI via Gdb-patches
2022-10-06 15:58 ` Palmer Dabbelt
2022-10-06 16:14 ` Tsukasa OI via Gdb-patches
2022-10-06 18:27 ` Palmer Dabbelt
2022-10-11 11:43 ` Andrew Burgess via Gdb-patches
2022-10-11 11:41 ` Andrew Burgess via Gdb-patches
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