From: Milica Matic <milicamatic05@gmail.com>
To: gdb-patches@sourceware.org
Cc: milica.matic@htecgroup.com, simark@simark.ca, cfu@wavecomp.com,
aburgess@redhat.com, kevinb@redhat.com, macro@orcam.me.uk,
djordje.todorovic@htecgroup.com,
Matthew Fortune <matthew.fortune@imgtec.com>,
Matthew Fortune <matthew.fortune@mips.com>,
Faraz Shahbazker <fshahbazker@wavecomp.com>
Subject: [PATCH 03/21] Improve WARN for $0 constraint on MIPSR6 branches
Date: Fri, 13 Dec 2024 16:53:10 +0100 [thread overview]
Message-ID: <20241213155328.406003-5-milica.matic@htecgroup.com> (raw)
In-Reply-To: <20241213155328.406003-1-milica.matic@htecgroup.com>
From: Matthew Fortune <matthew.fortune@imgtec.com>
Validation of warnings and error detection within branching
instructions for the MIPS R6 architecture. The test ensures that
the assembler generates accurate warnings when a user makes an
error involving the use of the $0 register in branching instructions,
thereby improving the reliability and correctness of binary outputs.
Cherry-picked 280a501
from https://github.com/MIPS/binutils-gdb
Signed-off-by: Matthew Fortune <matthew.fortune@mips.com>
Signed-off-by: Faraz Shahbazker <fshahbazker@wavecomp.com>
Signed-off-by: Milica Matic <milica.matic@htecgroup.com>
gas/
* testsuite/gas/mips/r6-branch-constraints.l: New file.
---
.../gas/mips/r6-branch-constraints.l | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
create mode 100644 gas/testsuite/gas/mips/r6-branch-constraints.l
diff --git a/gas/testsuite/gas/mips/r6-branch-constraints.l b/gas/testsuite/gas/mips/r6-branch-constraints.l
new file mode 100644
index 00000000000..3be2005f571
--- /dev/null
+++ b/gas/testsuite/gas/mips/r6-branch-constraints.l
@@ -0,0 +1,25 @@
+.*: Assembler messages:
+.*:2: Error: the source register must not be \$0 `blezc \$0,.'
+.*:3: Error: the source register must not be \$0 `bgezc \$0,.'
+.*:4: Error: the source register must not be \$0 `bgtzc \$0,.'
+.*:5: Error: the source register must not be \$0 `bltzc \$0,.'
+.*:6: Error: the source register must not be \$0 `beqzc \$0,.'
+.*:7: Error: the source register must not be \$0 `bnezc \$0,.'
+.*:8: Error: the source register must not be \$0 `bgec \$0,\$2,.'
+.*:9: Error: invalid operands `bgec \$2,\$0,.'
+.*:10: Error: invalid operands `bgec \$2,\$2,.'
+.*:11: Error: the source register must not be \$0 `bgeuc \$0,\$2,.'
+.*:12: Error: invalid operands `bgeuc \$2,\$0,.'
+.*:13: Error: invalid operands `bgeuc \$2,\$2,.'
+.*:14: Error: the source register must not be \$0 `bltc \$0,\$2,.'
+.*:15: Error: invalid operands `bltc \$2,\$0,.'
+.*:16: Error: invalid operands `bltc \$2,\$2,.'
+.*:17: Error: the source register must not be \$0 `bltuc \$0,\$2,.'
+.*:18: Error: invalid operands `bltuc \$2,\$0,.'
+.*:19: Error: invalid operands `bltuc \$2,\$2,.'
+.*:20: Error: the source register must not be \$0 `beqc \$0,\$2,.'
+.*:21: Error: invalid operands `beqc \$2,\$0,.'
+.*:22: Error: invalid operands `beqc \$2,\$2,.'
+.*:23: Error: the source register must not be \$0 `bnec \$0,\$2,.'
+.*:24: Error: invalid operands `bnec \$2,\$0,.'
+.*:25: Error: invalid operands `bnec \$2,\$2,.'
\ No newline at end of file
--
2.34.1
next prev parent reply other threads:[~2024-12-13 16:03 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-13 15:53 [PATCH 0/21] Integrate MIPS-Specific Support into Official binutils-gdb Milica Matic
2024-12-13 15:53 ` [PATCH 00/21] " Milica Matic
2024-12-13 15:53 ` [PATCH 01/21] Don't adjust microMIPS HI/LO rel section-relative Milica Matic
2024-12-13 15:53 ` [PATCH 02/21] Add new relocations for microMIPSR6 Milica Matic
2024-12-13 15:53 ` Milica Matic [this message]
2024-12-13 15:53 ` [PATCH 04/21] Instruction mapping support (pre-R6 to R6) Milica Matic
2024-12-13 15:53 ` [PATCH 05/21] Add microMIPSR6 support Milica Matic
2024-12-13 15:53 ` [PATCH 06/21] Update branch relaxation Milica Matic
2024-12-13 15:53 ` [PATCH 07/21] Add --user-defined-sdata-sections Milica Matic
2024-12-13 15:53 ` [PATCH 08/21] Disassembler fix Milica Matic
2024-12-13 15:53 ` [PATCH 09/21] MIPS: Add CRYPTO ASE support Milica Matic
2024-12-13 15:53 ` [PATCH 10/21] Add the m6201 architecture Milica Matic
2024-12-13 15:53 ` [PATCH 11/21] Add GINV(+VIRT) ASE for MIPSr6/microMIPS6 Milica Matic
2024-12-13 15:53 ` [PATCH 12/21] Implement the XBurst MXU extensions Milica Matic
2024-12-13 15:53 ` [PATCH 13/21] MIPS: Update encoding of d16mule MXU instruction Milica Matic
2024-12-13 15:53 ` [PATCH 14/21] Re-arrange MXU code blocks and add comments Milica Matic
2024-12-13 15:53 ` [PATCH 15/21] Accept MCU mapped string operands as constants Milica Matic
2024-12-13 15:53 ` [PATCH 16/21] Fix addr2line mapping - garbage collected modules Milica Matic
2024-12-13 15:53 ` [PATCH 17/21] Extend trap macros to handle immediate zero Milica Matic
2024-12-13 15:53 ` [PATCH 18/21] Fix failing test cases for linux and 64-bit target Milica Matic
2024-12-13 15:53 ` [PATCH 19/21] Remove exec permission tc-mips.c Milica Matic
2024-12-13 15:53 ` [PATCH 20/21] Workaround for line info in compressed MIPS func Milica Matic
2024-12-13 15:53 ` [PATCH 21/21] Fix gold linker build issues for mingw Milica Matic
2025-01-07 21:18 ` [PATCH 0/21] Integrate MIPS-Specific Support into Official binutils-gdb Kevin Buettner
2025-01-09 1:11 ` [EXTERNAL]Re: " Chao-ying Fu
2025-01-07 21:31 ` Kevin Buettner
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