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From: John Baldwin <jhb@FreeBSD.org>
To: gdb-patches@sourceware.org
Cc: andrew.burgess@embecosm.com,	jimw@sifive.com,	palmer@sifive.com
Subject: [PATCH 0/4] Initial support for FreeBSD/riscv
Date: Wed, 19 Sep 2018 23:20:00 -0000	[thread overview]
Message-ID: <20180919231950.22634-1-jhb@FreeBSD.org> (raw)

This series adds support for FreeBSD/riscv targets.  Note that I've
attempted to make the port support either RV32 or RV64, but FreeBSD
currently only supports RV64.

Patch 1 tries to make it easier to write handlers for signal frame by
allowing the register map structures used with register caches to be
used with trad-frame to supply a block of registers at a starting
address.  It gets somewhat squishy when thinking about how to handle
registers whose size doesn't match the "slot" size in a register map.
I've attempted to make the trad-frame handling match the semantics
that regcache uses.  However, these semantics aren't documented
anywhere and we should perhaps document them.  Also, in this patch I
used 'void *' for the map only because it matches what the regcache
functions do.  I'm happy to make the map argument type-safe instead if
others prefer that.  Also, the comments for regcache_map_entry should
perhaps be made more generic to say it isn't specific to regcache but
is used to describe the layout of a register block.  Arguably the type
should even be renamed to something less regcache-specific
(register_map_entry?).  If we do adopt this patch I will probably make
use of it in some other FreeBSD architectures (aarch64 and arm at
least, possibly x86).

Patch 2's commit log is a bit preachy perhaps and can be toned down if
needed.  I'm curious if my thoughts about using target descriptions
are correct?  It is what x86 does to handle 32-bit vs 64-bit as well
as handling various optional register sets.

John Baldwin (4):
  Add helper functions to trad_frame to support register cache maps.
  Fall back to a default value of 0 for the MISA register.
  Add FreeBSD/riscv architecture.
  Add native target for FreeBSD/riscv.

 gdb/ChangeLog         |  30 ++++++
 gdb/Makefile.in       |   4 +
 gdb/NEWS              |   2 +
 gdb/configure.host    |   1 +
 gdb/configure.nat     |   4 +
 gdb/configure.tgt     |   5 +
 gdb/doc/ChangeLog     |   5 +
 gdb/doc/gdb.texinfo   |   6 ++
 gdb/riscv-fbsd-nat.c  | 135 +++++++++++++++++++++++++++
 gdb/riscv-fbsd-tdep.c | 206 ++++++++++++++++++++++++++++++++++++++++++
 gdb/riscv-fbsd-tdep.h |  33 +++++++
 gdb/riscv-tdep.c      |  13 ++-
 gdb/trad-frame.c      |  69 ++++++++++++++
 gdb/trad-frame.h      |   8 ++
 14 files changed, 519 insertions(+), 2 deletions(-)
 create mode 100644 gdb/riscv-fbsd-nat.c
 create mode 100644 gdb/riscv-fbsd-tdep.c
 create mode 100644 gdb/riscv-fbsd-tdep.h

-- 
2.18.0


             reply	other threads:[~2018-09-19 23:20 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-19 23:20 John Baldwin [this message]
2018-09-19 23:21 ` [PATCH 3/4] Add FreeBSD/riscv architecture John Baldwin
2018-09-19 23:21 ` [PATCH 2/4] Fall back to a default value of 0 for the MISA register John Baldwin
2018-09-20  0:09   ` Jim Wilson
2018-09-20  0:40     ` John Baldwin
2018-09-20 20:31       ` John Baldwin
2018-09-20 20:57         ` Jim Wilson
2018-09-20 22:55           ` John Baldwin
2018-09-20 21:51         ` Andrew Burgess
2018-09-20 23:01           ` John Baldwin
2018-09-21  9:27             ` Andrew Burgess
2018-09-21 17:26               ` Jim Wilson
2018-09-28  9:44                 ` Andrew Burgess
2018-09-28 18:25                   ` Palmer Dabbelt
2018-09-24 20:35               ` John Baldwin
2018-09-19 23:21 ` [PATCH 1/4] Add helper functions to trad_frame to support register cache maps John Baldwin
2018-09-19 23:29 ` [PATCH 4/4] Add native target for FreeBSD/riscv John Baldwin
2018-09-20  4:19   ` Eli Zaretskii

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