Commit: Obvious fixes for PR 18273

Commit: Obvious fixes for PR 18273

[Nick Clifton]

Hi Guys,

  PR 18273 has exposed some typos in the simulator code, and provides
  some simple. obvious fixes for them.  So I have gone ahead and checked
  these fixes in.

Cheers
  Nick

sim/bfin/ChangeLog
2015-04-24  David Binderman  <dcb314@hotmail.com>
	    Nick Clifton  <nickc@redhat.com>

	PR 18273
	* bfin-sim.c (decode_dsp32alu_0): Remove spurious check for
	s == 1.

sim/erc32/ChangeLog
2015-04-24  David Binderman  <dcb314@hotmail.com>
	    Nick Clifton  <nickc@redhat.com>

	PR 18273
	* exec.c (add32): Fix typo in check for overflow.

sim/igen/ChangeLog
2015-04-24  David Binderman  <dcb314@hotmail.com>
	    Nick Clifton  <nickc@redhat.com>

	PR 18273
	* misc.c (a2i): Fix typos checking for uppercase letters.

diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index 364ee29..24b29e7 100644
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -4318,7 +4318,7 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
       SET_AREG (1, 0);
     }
   else if ((aop == 0 || aop == 1 || aop == 2) && s == 1 && aopcde == 8
-	   && x == 0 && s == 1 && HL == 0)
+	   && x == 0 && HL == 0)
     {
       bs40 acc0 = get_extended_acc (cpu, 0);
       bs40 acc1 = get_extended_acc (cpu, 1);

diff --git a/sim/erc32/exec.c b/sim/erc32/exec.c
index d31032b..0d87aa3 100644
--- a/sim/erc32/exec.c
+++ b/sim/erc32/exec.c
@@ -292,7 +292,7 @@ add32 (uint32 n1, uint32 n2, int *carry)
 {
   uint32 result = n1 + n2;
 
-  *carry = result < n1 || result < n1;
+  *carry = result < n1 || result < n2;
   return result;
 }
 
diff --git a/sim/igen/misc.c b/sim/igen/misc.c
index 71e34fb..6501352 100644
--- a/sim/igen/misc.c
+++ b/sim/igen/misc.c
@@ -102,7 +102,7 @@ a2i (const char *a)
   if (strcmp (a, "true") == 0 || strcmp (a, "TRUE") == 0)
     return 1;
 
-  if (strcmp (a, "false") == 0 || strcmp (a, "false") == 0)
+  if (strcmp (a, "false") == 0 || strcmp (a, "FALSE") == 0)
     return 0;
 
   if (*a == '-')
@@ -118,7 +118,7 @@ a2i (const char *a)
 	  a += 2;
 	  base = 16;
 	}
-      else if (a[1] == 'b' || a[1] == 'b')
+      else if (a[1] == 'b' || a[1] == 'B')
 	{
 	  a += 2;
 	  base = 2;

Re: Commit: Obvious fixes for PR 18273

[Mike Frysinger]

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On 24 Apr 2015 15:42, Nick Clifton wrote:
> --- a/sim/bfin/bfin-sim.c
> +++ b/sim/bfin/bfin-sim.c
> @@ -4318,7 +4318,7 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
>        SET_AREG (1, 0);
>      }
>    else if ((aop == 0 || aop == 1 || aop == 2) && s == 1 && aopcde == 8
> -	   && x == 0 && s == 1 && HL == 0)
> +	   && x == 0 && HL == 0)
>      {
>        bs40 acc0 = get_extended_acc (cpu, 0);
>        bs40 acc1 = get_extended_acc (cpu, 1);

this one i was sitting on until i could go through the ISA and figure out the 
exact matching.  it is duplicated as-is, but it might have been a typo and 
should have been checking a different field.  but i'll follow up on that 
independently.
-mike

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Re: Commit: Obvious fixes for PR 18273

[Mike Frysinger]

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On 24 Apr 2015 14:53, Mike Frysinger wrote:
> On 24 Apr 2015 15:42, Nick Clifton wrote:
> > --- a/sim/bfin/bfin-sim.c
> > +++ b/sim/bfin/bfin-sim.c
> > @@ -4318,7 +4318,7 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
> >        SET_AREG (1, 0);
> >      }
> >    else if ((aop == 0 || aop == 1 || aop == 2) && s == 1 && aopcde == 8
> > -	   && x == 0 && s == 1 && HL == 0)
> > +	   && x == 0 && HL == 0)
> >      {
> >        bs40 acc0 = get_extended_acc (cpu, 0);
> >        bs40 acc1 = get_extended_acc (cpu, 1);
> 
> this one i was sitting on until i could go through the ISA and figure out the 
> exact matching.  it is duplicated as-is, but it might have been a typo and 
> should have been checking a different field.  but i'll follow up on that 
> independently.

looks like deleting the check is fine.  all the other fields in the encoding are 
covered here or earlier.  thanks!
-mike

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