[RFA] Arm: change #defines to enums

[RFA] Arm: change #defines to enums

[Michael Snyder]

Is this OK with folks?

2002-04-18  Michael Snyder  <msnyder@redhat.com>

	* arm-tdep.h: Change defines to enums for ease of debugging.

Index: arm-tdep.h
===================================================================
RCS file: /cvs/src/src/gdb/arm-tdep.h,v
retrieving revision 1.6
diff -c -3 -p -r1.6 arm-tdep.h
*** arm-tdep.h	19 Feb 2002 19:20:31 -0000	1.6
--- arm-tdep.h	18 Apr 2002 22:24:29 -0000
***************
*** 25,103 ****
     the user is concerned but do serve to get the desired values when
     passed to read_register.  */
  
! #define ARM_A1_REGNUM 0		/* first integer-like argument */
! #define ARM_A4_REGNUM 3		/* last integer-like argument */
! #define ARM_AP_REGNUM 11
! #define ARM_SP_REGNUM 13	/* Contains address of top of stack */
! #define ARM_LR_REGNUM 14	/* address to return to from a function call */
! #define ARM_PC_REGNUM 15	/* Contains program counter */
! #define ARM_F0_REGNUM 16	/* first floating point register */
! #define ARM_F3_REGNUM 19	/* last floating point argument register */
! #define ARM_F7_REGNUM 23	/* last floating point register */
! #define ARM_FPS_REGNUM 24	/* floating point status register */
! #define ARM_PS_REGNUM 25	/* Contains processor status */
! 
! #define ARM_FP_REGNUM 11	/* Frame register in ARM code, if used.  */
! #define THUMB_FP_REGNUM 7	/* Frame register in Thumb code, if used.  */
! 
! #define ARM_NUM_ARG_REGS 	4
! #define ARM_LAST_ARG_REGNUM 	ARM_A4_REGNUM
! #define ARM_NUM_FP_ARG_REGS 	4
! #define ARM_LAST_FP_ARG_REGNUM	ARM_F3_REGNUM
! 
! /* Size of integer registers.  */
! #define INT_REGISTER_RAW_SIZE		4
! #define INT_REGISTER_VIRTUAL_SIZE	4
! 
! /* Say how long FP registers are.  Used for documentation purposes and
!    code readability in this header.  IEEE extended doubles are 80
!    bits.  DWORD aligned they use 96 bits.  */
! #define FP_REGISTER_RAW_SIZE	12
! 
! /* GCC doesn't support long doubles (extended IEEE values).  The FP
!    register virtual size is therefore 64 bits.  Used for documentation
!    purposes and code readability in this header.  */
! #define FP_REGISTER_VIRTUAL_SIZE	8
! 
! /* Status registers are the same size as general purpose registers.
!    Used for documentation purposes and code readability in this
!    header.  */
! #define STATUS_REGISTER_SIZE	4
! 
! /* Number of machine registers.  The only define actually required 
!    is NUM_REGS.  The other definitions are used for documentation
!    purposes and code readability.  */
! /* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS)
!    (and called PS for processor status) so the status bits can be cleared
!    from the PC (register 15).  For 32 bit ARM code, a copy of CPSR is placed
!    in PS.  */
! #define NUM_FREGS	8	/* Number of floating point registers.  */
! #define NUM_SREGS	2	/* Number of status registers.  */
! #define NUM_GREGS	16	/* Number of general purpose registers.  */
  
  
  /* Instruction condition field values.  */
! #define INST_EQ		0x0
! #define INST_NE		0x1
! #define INST_CS		0x2
! #define INST_CC		0x3
! #define INST_MI		0x4
! #define INST_PL		0x5
! #define INST_VS		0x6
! #define INST_VC		0x7
! #define INST_HI		0x8
! #define INST_LS		0x9
! #define INST_GE		0xa
! #define INST_LT		0xb
! #define INST_GT		0xc
! #define INST_LE		0xd
! #define INST_AL		0xe
! #define INST_NV		0xf
! 
! #define FLAG_N		0x80000000
! #define FLAG_Z		0x40000000
! #define FLAG_C		0x20000000
! #define FLAG_V		0x10000000
  
  /* ABI variants that we know about.  If you add to this enum, please 
     update the table of names in tm-arm.c.  */
--- 25,113 ----
     the user is concerned but do serve to get the desired values when
     passed to read_register.  */
  
! enum gdb_regnum {
!   ARM_A1_REGNUM = 0,		/* first integer-like argument */
!   ARM_A4_REGNUM = 3,		/* last integer-like argument */
!   ARM_AP_REGNUM = 11,
!   ARM_SP_REGNUM = 13,		/* Contains address of top of stack */
!   ARM_LR_REGNUM = 14,		/* address to return to from a function call */
!   ARM_PC_REGNUM = 15,		/* Contains program counter */
!   ARM_F0_REGNUM = 16,		/* first floating point register */
!   ARM_F3_REGNUM = 19,		/* last floating point argument register */
!   ARM_F7_REGNUM = 23, 		/* last floating point register */
!   ARM_FPS_REGNUM = 24,		/* floating point status register */
!   ARM_PS_REGNUM = 25,		/* Contains processor status */
!   ARM_FP_REGNUM = 11,		/* Frame register in ARM code, if used.  */
!   THUMB_FP_REGNUM = 7,		/* Frame register in Thumb code, if used.  */
!   ARM_NUM_ARG_REGS = 4, 
!   ARM_LAST_ARG_REGNUM = ARM_A4_REGNUM,
!   ARM_NUM_FP_ARG_REGS = 4,
!   ARM_LAST_FP_ARG_REGNUM = ARM_F3_REGNUM
! };
! 
! enum gdb_arm_const {
!   INT_REGISTER_RAW_SIZE = 4,
!   INT_REGISTER_VIRTUAL_SIZE = 4,
! 
!   /* Say how long FP registers are.  Used for documentation purposes
!      and code readability in this header.  IEEE extended doubles are
!      80 bits.  DWORD aligned they use 96 bits.  */
! 
!   FP_REGISTER_RAW_SIZE = 12,
! 
!   /* GCC doesn't support long doubles (extended IEEE values).  The FP
!      register virtual size is therefore 64 bits.  Used for
!      documentation purposes and code readability in this header.  */
! 
!   FP_REGISTER_VIRTUAL_SIZE = 8,
! 
!   /* Status registers are the same size as general purpose registers.
!      Used for documentation purposes and code readability in this
!      header.  */
! 
!   STATUS_REGISTER_SIZE = 4,
! 
!   /* Number of machine registers.  The only define actually required
!      is NUM_REGS.  The other definitions are used for documentation
!      purposes and code readability.  */
!   /* For 26 bit ARM code, a fake copy of the PC is placed in register
!      25 (PS) (and called PS for processor status) so the status bits
!      can be cleared from the PC (register 15).  For 32 bit ARM code, a
!      copy of CPSR is placed in PS.  */
! 
!   NUM_FREGS = 8,		/* Number of floating point registers.  */
!   NUM_SREGS = 2,		/* Number of status registers.  */
!   NUM_GREGS = 16,		/* Number of general purpose registers.  */
!   GDB_NUM_REGS  = (NUM_FREGS + NUM_SREGS + NUM_GREGS)
  
+ };
  
  /* Instruction condition field values.  */
! enum gdb_condition_field {
!   INST_EQ = 0x0,
!   INST_NE = 0x1,
!   INST_CS = 0x2,
!   INST_CC = 0x3,
!   INST_MI = 0x4,
!   INST_PL = 0x5,
!   INST_VS = 0x6,
!   INST_VC = 0x7,
!   INST_HI = 0x8,
!   INST_LS = 0x9,
!   INST_GE = 0xa,
!   INST_LT = 0xb,
!   INST_GT = 0xc,
!   INST_LE = 0xd,
!   INST_AL = 0xe,
!   INST_NV = 0xf
! };
! 
! enum gdb_condition_flag {
!   FLAG_N = 0x80000000,
!   FLAG_Z = 0x40000000,
!   FLAG_C = 0x20000000,
!   FLAG_V = 0x10000000
! };
  
  /* ABI variants that we know about.  If you add to this enum, please 
     update the table of names in tm-arm.c.  */

Re: [RFA] Arm: change #defines to enums

[Richard Earnshaw]

> Is this OK with folks?
> 
> 2002-04-18  Michael Snyder  <msnyder@redhat.com>
> 
> 	* arm-tdep.h: Change defines to enums for ease of debugging.

I'm happy with the change to the regnums, but not with the other bits.  
The other fields are really parts of a bitmask, not separate enums.

For example, it doesn't make sense to me to have enums that should be 
orred together, as in FLAG_N | FLAG_Z.

I suspect that 

! enum gdb_condition_flag {
!   FLAG_N = 0x80000000,
!   FLAG_Z = 0x40000000,
!   FLAG_C = 0x20000000,
!   FLAG_V = 0x10000000
! };

will trip the problem with displaying enums with the top bit set on 32-bit 
platforms, so instead of making debugging easier, it will make it 
impossible. (There's a PR about it).

I also can't really see how 


! enum gdb_arm_const {
!   INT_REGISTER_RAW_SIZE = 4,
!   INT_REGISTER_VIRTUAL_SIZE = 4,
! 
...

will make debugging easier, in fact I would say it would be more 
confusing, since gdb won't know which one to use when displaying a value.

R.

Re: [RFA] Arm: change #defines to enums

[Michael Snyder]

Richard Earnshaw wrote:
> 
> > Is this OK with folks?
> >
> > 2002-04-18  Michael Snyder  <msnyder@redhat.com>
> >
> >       * arm-tdep.h: Change defines to enums for ease of debugging.
> 
> I'm happy with the change to the regnums, but not with the other bits.
> The other fields are really parts of a bitmask, not separate enums.
> 
> For example, it doesn't make sense to me to have enums that should be
> orred together, as in FLAG_N | FLAG_Z.
> 
> I suspect that
> 
> ! enum gdb_condition_flag {
> !   FLAG_N = 0x80000000,
> !   FLAG_Z = 0x40000000,
> !   FLAG_C = 0x20000000,
> !   FLAG_V = 0x10000000
> ! };
> 
> will trip the problem with displaying enums with the top bit set on 32-bit
> platforms, so instead of making debugging easier, it will make it
> impossible. (There's a PR about it).

Hmmm, all right, I'll omit those...

> 
> I also can't really see how
> 
> ! enum gdb_arm_const {
> !   INT_REGISTER_RAW_SIZE = 4,
> !   INT_REGISTER_VIRTUAL_SIZE = 4,
> !
> ...
> 
> will make debugging easier, in fact I would say it would be more
> confusing, since gdb won't know which one to use when displaying a value.

The idea is just that, if I'm debugging and I see 
INT_REGISTER_RAW_SIZE in an expression, I can find out
what its value is.

Michael

Re: [RFA] Arm: change #defines to enums

[Elena Zannoni]

Michael Snyder writes:
 > Richard Earnshaw wrote:
 > > 
 > > > Is this OK with folks?
 > > >
 > > > 2002-04-18  Michael Snyder  <msnyder@redhat.com>
 > > >
 > > >       * arm-tdep.h: Change defines to enums for ease of debugging.
 > > 
 > > I'm happy with the change to the regnums, but not with the other bits.

Actually, would it be better to put the regnums inside the tdep
structure, like sh and powerpc do? That has really helped a lot when
adding a variant that has different registers.

Elena


 > > The other fields are really parts of a bitmask, not separate enums.
 > > 
 > > For example, it doesn't make sense to me to have enums that should be
 > > orred together, as in FLAG_N | FLAG_Z.
 > > 
 > > I suspect that
 > > 
 > > ! enum gdb_condition_flag {
 > > !   FLAG_N = 0x80000000,
 > > !   FLAG_Z = 0x40000000,
 > > !   FLAG_C = 0x20000000,
 > > !   FLAG_V = 0x10000000
 > > ! };
 > > 
 > > will trip the problem with displaying enums with the top bit set on 32-bit
 > > platforms, so instead of making debugging easier, it will make it
 > > impossible. (There's a PR about it).
 > 
 > Hmmm, all right, I'll omit those...
 > 
 > > 
 > > I also can't really see how
 > > 
 > > ! enum gdb_arm_const {
 > > !   INT_REGISTER_RAW_SIZE = 4,
 > > !   INT_REGISTER_VIRTUAL_SIZE = 4,
 > > !
 > > ...
 > > 
 > > will make debugging easier, in fact I would say it would be more
 > > confusing, since gdb won't know which one to use when displaying a value.
 > 
 > The idea is just that, if I'm debugging and I see 
 > INT_REGISTER_RAW_SIZE in an expression, I can find out
 > what its value is.
 > 
 > Michael

Re: [RFA] Arm: change #defines to enums

[Michael Snyder]

Elena Zannoni wrote:
> 
> Michael Snyder writes:
>  > Richard Earnshaw wrote:
>  > >
>  > > > Is this OK with folks?
>  > > >
>  > > > 2002-04-18  Michael Snyder  <msnyder@redhat.com>
>  > > >
>  > > >       * arm-tdep.h: Change defines to enums for ease of debugging.
>  > >
>  > > I'm happy with the change to the regnums, but not with the other bits.
> 
> Actually, would it be better to put the regnums inside the tdep
> structure, like sh and powerpc do? That has really helped a lot when
> adding a variant that has different registers.

That's a separate issue, I think (I have no idea if some of these
regnums may change from one variant to another).  All I wanted
was to be able to cut and paste an expression that uses these
constants, and evaluate it.

Michael

Re: [RFA] Arm: change #defines to enums

[Richard Earnshaw]

> > 
> > I also can't really see how
> > 
> > ! enum gdb_arm_const {
> > !   INT_REGISTER_RAW_SIZE = 4,
> > !   INT_REGISTER_VIRTUAL_SIZE = 4,
> > !
> > ...
> > 
> > will make debugging easier, in fact I would say it would be more
> > confusing, since gdb won't know which one to use when displaying a value.
> 
> The idea is just that, if I'm debugging and I see 
> INT_REGISTER_RAW_SIZE in an expression, I can find out
> what its value is.

(Well, dwarf2 debug info should be able to tell you (if you've turned the 
level up enough to add that detail :-)

However, The main problem I have with the above, is that ..._RAW_SIZE and 
.._VIRTUAL_SIZE should be in different enums.

Just because C doesn't apply a strict typing model to enums (sadly), is no 
reason to abuse these.  A variable holding a RAW_SIZE value shouldn't also 
be holding a VIRTUAL_SIZE, the two are different and hence the enums 
describing them should be also.

R.

Re: [RFA] Arm: change #defines to enums

[Michael Snyder]

Richard Earnshaw wrote:
> 
> > >
> > > I also can't really see how
> > >
> > > ! enum gdb_arm_const {
> > > !   INT_REGISTER_RAW_SIZE = 4,
> > > !   INT_REGISTER_VIRTUAL_SIZE = 4,
> > > !
> > > ...
> > >
> > > will make debugging easier, in fact I would say it would be more
> > > confusing, since gdb won't know which one to use when displaying a value.
> >
> > The idea is just that, if I'm debugging and I see
> > INT_REGISTER_RAW_SIZE in an expression, I can find out
> > what its value is.
> 
> (Well, dwarf2 debug info should be able to tell you (if you've turned the
> level up enough to add that detail :-)
> 
> However, The main problem I have with the above, is that ..._RAW_SIZE and
> .._VIRTUAL_SIZE should be in different enums.
> 
> Just because C doesn't apply a strict typing model to enums (sadly), is no
> reason to abuse these.  A variable holding a RAW_SIZE value shouldn't also
> be holding a VIRTUAL_SIZE, the two are different and hence the enums
> describing them should be also.

OK then -- I've committed only the regnums.

Michael