[RFC/commit] Add a sparc simulator with the sparc bareboard target.

[RFC/commit] Add a sparc simulator with the sparc bareboard target.

[Joel Brobecker]

This is something that the RTEMS target already does. I think we should
do that for any bareboard sparc.  The simulator might not handle v8 or
v9, I'm not sure, since it is stored in the erc32 subdirectory.  But
at least v7 should work, and I am hoping that anyone interested in later
versions of sparc in the simulator should be able to enhance it so.

gdb/ChangeLog:

        * configure.tgt (sparc-*-*): Set gdb_sim to ../sim/erc32/libsim.a.

Any objection?

---
 gdb/configure.tgt |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/gdb/configure.tgt b/gdb/configure.tgt
index 80cfb49..65e764e 100644
--- a/gdb/configure.tgt
+++ b/gdb/configure.tgt
@@ -523,6 +523,7 @@ sparc-*-*)
 	# Target: SPARC
 	gdb_target_obs="sparc-tdep.o ravenscar-thread.o \
 			ravenscar-sparc-thread.o"
+	gdb_sim=../sim/erc32/libsim.a
 	;;
 sparc64-*-*)
 	# Target: UltraSPARC
-- 
1.7.1

Re: [RFC/commit] Add a sparc simulator with the sparc bareboard target.

[Mark Kettenis]

> From: Joel Brobecker <brobecker@adacore.com>
> Date: Thu, 23 Sep 2010 11:45:49 -0700
> 
> This is something that the RTEMS target already does. I think we should
> do that for any bareboard sparc.  The simulator might not handle v8 or
> v9, I'm not sure, since it is stored in the erc32 subdirectory.  But
> at least v7 should work, and I am hoping that anyone interested in later
> versions of sparc in the simulator should be able to enhance it so.
> 
> gdb/ChangeLog:
> 
>         * configure.tgt (sparc-*-*): Set gdb_sim to ../sim/erc32/libsim.a.
> 
> Any objection?

In that case, the sparc-*-rtems* case can probably go.

Re: [RFC/commit] Add a sparc simulator with the sparc bareboard target.

[Joel Brobecker]

[-- Attachment #1: Type: text/plain, Size: 319 bytes --]

> > gdb/ChangeLog:
> > 
> >         * configure.tgt (sparc-*-*): Set gdb_sim to ../sim/erc32/libsim.a.
> 
> In that case, the sparc-*-rtems* case can probably go.

Agreed. I was going to do that as a separate commit, but might as well
do it at the same time.  Attached is the patch that I checked in.

Thanks,
-- 
Joel

[-- Attachment #2: sparc-sim.diff --]
[-- Type: text/x-diff, Size: 1514 bytes --]

commit cee1d53fc709075e121ad52e12ccb02cf5a53aac
Author: Joel Brobecker <brobecker@adacore.com>
Date:   Thu Sep 23 11:20:49 2010 -0700

    Add a sparc simulator with the sparc bareboard target.
    
    gdb/ChangeLog:
    
            * configure.tgt (sparc-*-*): Set gdb_sim to ../sim/erc32/libsim.a.
            (sparc-*-rtems*): Delete, now redundant with the sparc-*-* case.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 7cf8d90..e8b81e8 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,10 @@
 2010-09-28  Joel Brobecker  <brobecker@adacore.com>
 
+	* configure.tgt (sparc-*-*): Set gdb_sim to ../sim/erc32/libsim.a.
+        (sparc-*-rtems*): Delete. Now redundant with sparc-*-*.
+
+2010-09-28  Joel Brobecker  <brobecker@adacore.com>
+
 	* NEWS: Announce Ravenscar Profile support.
 
 2010-09-28  Joel Brobecker  <brobecker@adacore.com>
diff --git a/gdb/configure.tgt b/gdb/configure.tgt
index 80cfb49..24a6bf9 100644
--- a/gdb/configure.tgt
+++ b/gdb/configure.tgt
@@ -514,15 +514,11 @@ sparc-*-solaris2* | sparcv9-*-solaris2* | sparc64-*-solaris2*)
 	gdb_target_obs="sparc64-tdep.o sparc64-sol2-tdep.o sparc-tdep.o \
 			sparc-sol2-tdep.o sol2-tdep.o solib.o solib-svr4.o"
 	;;
-sparc-*-rtems*)
-	# Target: SPARC embedded with simulator
-	gdb_target_obs="sparc-tdep.o"
-	gdb_sim=../sim/erc32/libsim.a
-	;;
 sparc-*-*)
 	# Target: SPARC
 	gdb_target_obs="sparc-tdep.o ravenscar-thread.o \
 			ravenscar-sparc-thread.o"
+	gdb_sim=../sim/erc32/libsim.a
 	;;
 sparc64-*-*)
 	# Target: UltraSPARC