From: jwboyer@linux.vnet.ibm.com (Josh Boyer)
Subject: [ltt-dev] cli/sti vs local_cmpxchg and local_add_return
Date: Mon, 23 Mar 2009 13:04:18 -0400 [thread overview]
Message-ID: <20090323170418.GD4224@zod.rchland.ibm.com> (raw)
In-Reply-To: <20090323165632.GC24084@Krystal>
On Mon, Mar 23, 2009 at 12:56:32PM -0400, Mathieu Desnoyers wrote:
>* Josh Boyer (jwboyer at linux.vnet.ibm.com) wrote:
>> On Mon, Mar 16, 2009 at 09:32:20PM -0400, Mathieu Desnoyers wrote:
>> >Hi,
>> >
>> >I am trying to get access to some non-x86 hardware to run some atomic
>> >primitive benchmarks for a paper on LTTng I am preparing. That should be
>> >useful to argue about performance benefit of per-cpu atomic operations
>> >vs interrupt disabling. I would like to run the following benchmark
>> >module on CONFIG_SMP :
>> >
>> >- PowerPC
>> >- MIPS
>> >- ia64
>> >- alpha
>> >
>> >usage :
>> >make
>> >insmod test-cmpxchg-nolock.ko
>> >insmod: error inserting 'test-cmpxchg-nolock.ko': -1 Resource temporarily unavailable
>> >dmesg (see dmesg output)
>> >
>> >If some of you would be kind enough to run my test module provided below
>> >and provide the results of these tests on a recent kernel (2.6.26~2.6.29
>> >should be good) along with their cpuinfo, I would greatly appreciate.
>> >
>> >Here are the CAS results for various Intel-based architectures :
>> >
>> >Architecture | Speedup | CAS | Interrupts |
>> > | (cli + sti) / local cmpxchg | local | sync | Enable (sti) | Disable (cli)
>> >-------------------------------------------------------------------------------------------------
>> >Intel Pentium 4 | 5.24 | 25 | 81 | 70 | 61 |
>> >AMD Athlon(tm)64 X2 | 4.57 | 7 | 17 | 17 | 15 |
>> >Intel Core2 | 6.33 | 6 | 30 | 20 | 18 |
>> >Intel Xeon E5405 | 5.25 | 8 | 24 | 20 | 22 |
>>
>>
>> I know you have results from a POWER6 machine already, but
>> here are the results on a dual-G5 running 2.6.29-rc7-git4.
>>
>> If you are interested, I could get you results from running
>> this on an embedded PowerPC board.
>>
>
>Thanks for the results. Well, those already shows that the tradeoff is
>different between POWER6 and POWER5, so I guess further powerpc numbers
>won't be required.
Correction, a dual-G5 is a PowerPC 970 machine. It's closer to POWER4
than POWER5 and nothing like POWER6. The Apple G5 machines are about
2 generations old in terms of 64-bit PowerPC CPUs.
josh
prev parent reply other threads:[~2009-03-23 17:04 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-03-17 1:32 Mathieu Desnoyers
2009-03-17 3:37 ` David Miller
2009-03-17 4:10 ` Mathieu Desnoyers
2009-03-17 4:27 ` David Miller
2009-03-17 4:44 ` Mathieu Desnoyers
2009-03-17 5:01 ` Paul E. McKenney
2009-03-17 16:06 ` Mathieu Desnoyers
2009-03-17 19:28 ` David Miller
2009-03-17 19:35 ` Mathieu Desnoyers
2009-03-17 6:05 ` Nick Piggin
2009-03-17 15:14 ` Mathieu Desnoyers
2009-03-18 11:43 ` Nick Piggin
2009-03-18 15:10 ` Mathieu Desnoyers
2009-03-17 18:42 ` Alan D. Brunelle
2009-03-17 19:01 ` Andika Triwidada
2009-03-23 16:50 ` Mathieu Desnoyers
2009-03-18 11:56 ` Josh Boyer
2009-03-23 16:56 ` Mathieu Desnoyers
2009-03-23 17:04 ` Josh Boyer [this message]
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