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From: Yao Qi <qiyaoltc@gmail.com>
To: John Breitenbach <breiten@lexmark.com>, gdb@sourceware.org
Subject: Re: gdb won't single-step over ARM integer divide opcode
Date: Sun, 09 Aug 2015 11:39:00 -0000	[thread overview]
Message-ID: <55C73BEA.2050203@gmail.com> (raw)
In-Reply-To: <55C24FD0.8010007@lexmark.com>

On 05/08/15 19:02, John Breitenbach wrote:
> I did some debugging and have found that the function,
> arm_get_next_pc_raw, inappropriately decodes this opcode as a load into
> the PC register.  (bits 24..27 are 7, bit 20 is set, and the dest
> register appears to be the PC.
>
> Binutils's logic to disassemble the sdiv/udiv opcodes has opcode &
> 0x0ff0f0f0 = 0x0710f010 (with bit 21 distinguishing between udiv and sdiv)
>
> I've come up with the following patch which makes my situation work. But
> I don't know how complete it is, as there may be other newer opcodes
> which fall into the formerly undefined instruction space.

Hi John,
Thanks for your patch, however, I think I've fixed this problem in
patch https://sourceware.org/ml/gdb-patches/2015-06/msg00610.html
Does it work for you?  This commit will be in 7.10 release.

>
> Also, the comment "byte write to PC" around line 4930 seems wrong, as
> the check for bit 22 a few lines earlier catches that situation, and
> what's left is word writes to the PC."
>

Yeah, it is possible.  Patch is welcome :)

-- 
Yao (齐尧)


  reply	other threads:[~2015-08-09 11:39 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-05 18:03 John Breitenbach
2015-08-09 11:39 ` Yao Qi [this message]
2015-08-10 14:58   ` John Breitenbach

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