[Fwd: Re: SH5 compact register numbering in gcc -> gdb interface]

[Joern Rennecke <joern.rennecke@st.com>]

Sorry, I forgot to copy this to the list.

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Message-ID: <3CD820CD.9FC46E7F@st.com>
Date: Tue, 07 May 2002 19:45:33 +0100
From: Joern Rennecke <joern.rennecke@st.com>
Reply-To: joern.rennecke@st.com
Organization: SuperH UK Ltd.
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To: ac131313@cygnus.com
Subject: Re: SH5 compact register numbering in gcc -> gdb interface
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ac131313@cygnus.com wrote:
> Just FYI, the thing that controls the internal register layout of GDB is
> [currently] the remote protocol.  If you try to wire down GDB's internal
> register numbers to match the simulator, you'll likely break GDB's
> compatibility with existing remote targets.

Note, I'm not proposing to change the internal numbering for the SH1..SH4
targets, only for the SH5 target.
> 
> While this limitation is being worked on, it doesn't affect the GDB <->
> sim maping - that can already be adjusted independant of the other
> register numbering schema.

But should it?

The patches from Elena Zannoni only define one layout for SH5 registers,
which conflicts with the SH4 register layout.  So, currently, the register
layout in gdb is the same for simulator and remote targets for any given
SH processor.

I understand that we don't have much old tools to be
compatible with for SH5, so we can still change the interface.  And the
ambiguity issues that apply to the simulator interface apply as well
to remote targets, so I don't understand why you would require an
interface with unambigous register numbers for the simulator, while
rejecting it for remote targets.

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