From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29628 invoked by alias); 8 May 2002 09:47:49 -0000 Mailing-List: contact gdb-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sources.redhat.com Received: (qmail 29596 invoked from network); 8 May 2002 09:47:46 -0000 Received: from unknown (HELO beta.dmz-eu.st.com) (164.129.1.35) by sources.redhat.com with SMTP; 8 May 2002 09:47:46 -0000 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with SMTP id 7DB1850EF; Wed, 8 May 2002 09:47:28 +0000 (GMT) Received: by zeta.dmz-eu.st.com (STMicroelectronics, from userid 0) id 6FEDA6367; Wed, 8 May 2002 09:45:41 +0000 (GMT) Received: from thistle.bri.st.com (localhost [127.0.0.1]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0ADFB1849; Wed, 8 May 2002 09:45:41 +0000 (GMT) Received: from [164.129.8.14] (helo=masterwort) by thistle.bristol.st.com with esmtp (Exim 3.03 #5) id 175O0x-0002el-00; Wed, 08 May 2002 10:45:39 +0100 Received: from [164.129.14.84] (helo=st.com) by masterwort with asmtp (Exim 3.22 #1) id 175O0x-00050k-00; Wed, 08 May 2002 10:45:39 +0100 Message-ID: <3CD8F3EC.1FE421BB@st.com> Date: Wed, 08 May 2002 02:47:00 -0000 From: Joern Rennecke Reply-To: joern.rennecke@st.com Organization: SuperH UK Ltd. X-Accept-Language: en MIME-Version: 1.0 To: gdb@sources.redhat.com Cc: ac131313@cygnus.com Subject: [Fwd: Re: SH5 compact register numbering in gcc -> gdb interface] Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-SW-Source: 2002-05/txt/msg00071.txt.bz2 Sorry, I forgot to copy this to the list. -------- Original Message -------- Message-ID: <3CD820CD.9FC46E7F@st.com> Date: Tue, 07 May 2002 19:45:33 +0100 From: Joern Rennecke Reply-To: joern.rennecke@st.com Organization: SuperH UK Ltd. X-Mailer: Mozilla 4.78 [en] (X11; U; Linux 2.4.7-10 i686) X-Accept-Language: en MIME-Version: 1.0 To: ac131313@cygnus.com Subject: Re: SH5 compact register numbering in gcc -> gdb interface References: <3CCED903.294513BE@st.com> <15568.36275.110744.510692@localhost.redhat.com> <3CD12BF8.7E1650C1@st.com> <3CD80B1D.3020902@cygnus.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit ac131313@cygnus.com wrote: > Just FYI, the thing that controls the internal register layout of GDB is > [currently] the remote protocol. If you try to wire down GDB's internal > register numbers to match the simulator, you'll likely break GDB's > compatibility with existing remote targets. Note, I'm not proposing to change the internal numbering for the SH1..SH4 targets, only for the SH5 target. > > While this limitation is being worked on, it doesn't affect the GDB <-> > sim maping - that can already be adjusted independant of the other > register numbering schema. But should it? The patches from Elena Zannoni only define one layout for SH5 registers, which conflicts with the SH4 register layout. So, currently, the register layout in gdb is the same for simulator and remote targets for any given SH processor. I understand that we don't have much old tools to be compatible with for SH5, so we can still change the interface. And the ambiguity issues that apply to the simulator interface apply as well to remote targets, so I don't understand why you would require an interface with unambigous register numbers for the simulator, while rejecting it for remote targets. -- -------------------------- SuperH 2430 Aztec West / Almondsbury / BRISTOL / BS32 4AQ T:+44 1454 462330