From: Richard Earnshaw <rearnsha@arm.com>
To: Andrew Cagney <ac131313@cygnus.com>
Cc: Richard.Earnshaw@arm.com, Eli Zaretskii <eliz@is.elta.co.il>,
gdb@sources.redhat.com
Subject: Re: Multi-arch and user-control of architecture flags
Date: Thu, 16 May 2002 06:59:00 -0000 [thread overview]
Message-ID: <200205161359.OAA28147@cam-mail2.cambridge.arm.com> (raw)
In-Reply-To: Your message of "Thu, 16 May 2002 09:50:02 EDT." <3CE3B90A.1000904@cygnus.com>
> > /* Add root prefix command for all "set mips"/"show mips" commands */
> > add_prefix_cmd ("mips", no_class, set_mips_command,
> > "Various MIPS specific commands.",
> > &setmipscmdlist, "set mips ", 0, &setlist);
> >
> > add_prefix_cmd ("mips", no_class, show_mips_command,
> > "Various MIPS specific commands.",
> > &showmipscmdlist, "show mips ", 0, &showlist);
> >
>
> Just a PS on this. The command set ``set mips fpu ...'' et.al. isn't
> perfect - it sets a global for all mips which is probably sufficient for
> what people want.
>
> Eventually a per thread command may be needed. So that a target
> containing an 8086 and x86-64 can have, separatly, their disassembly
> mode. Something like:
>
> thread 5 set i386 disassembler x86-64
>
> (just ignore the syntax though). However, not our problem :-)
>
Yeah! I was thinking of a similar sort of requirement if a user has two
physical CPUs in the design, then you would need to be able to configure
each instance.
However, we would need to be able to have multiple instances of the
gdbarch current for that to work...
R.
prev parent reply other threads:[~2002-05-16 13:59 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-05-15 2:32 Richard Earnshaw
2002-05-15 3:23 ` Eli Zaretskii
2002-05-15 7:04 ` Andrew Cagney
2002-05-15 7:11 ` Richard Earnshaw
2002-05-15 7:21 ` Andrew Cagney
2002-05-16 6:49 ` Andrew Cagney
2002-05-16 6:59 ` Richard Earnshaw [this message]
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