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From: Richard Earnshaw <rearnsha@arm.com>
To: Adrian von Bidder <avbidder@acter.ch>
Cc: gdb mailing list <gdb@sources.redhat.com>, Richard.Earnshaw@arm.com
Subject: Re: [arm] force gdb into disassembling in thumb (arm) mode
Date: Wed, 23 Jan 2002 03:44:00 -0000	[thread overview]
Message-ID: <200201231044.KAA11674@cam-mail2.cambridge.arm.com> (raw)
In-Reply-To: Your message of "23 Jan 2002 10:56:13 +0100." <1011779773.10599.4.camel@atlas>

> The sensible way (imho) would be to interpret the (h)alfword/(w)ord
> format letters, so that x/ih and x/iw would force to interpret 16/32 bit
> instructions.

Yes, something like this would be nice.

> x/i on an odd address currently does switch to thumb mode - but it seems
> to interpret the instructions at the odd address (it doesn't strip the
> lsb when loading the data):
> 
> (gdb) x/20i 0xbe1
> 0xbe1:	ldrsh	r5, [r6, r6]
> 0xbe3:	strb	r6, [r0, r5]
> 0xbe5:	ldr	r4, [pc, #280]	(0xd00)
> 0xbe7:	add	sp, #280
> 0xbe9:	undefined instruction 0x47b4
> 0xbeb:	strh	r6, [r0, #2]

Hmm, a quick test on the CVS sources shows that using an odd address will 
DTRT (ie force thumb mode but then round the address down); I can't see 
anything from the commit log that might have changed.  The key is this 
line of code:

gdb/arm-tdep.c/gdb_print_insn_arm()
      memaddr = UNMAKE_THUMB_ADDR (memaddr);

Which strips off the thumb bit before actually loading the half-word.

R.


  reply	other threads:[~2002-01-23 11:44 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2002-01-23  1:56 Adrian von Bidder
2002-01-23  3:44 ` Richard Earnshaw [this message]
2002-01-23  4:27   ` Adrian von Bidder

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