From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11841 invoked by alias); 23 Jan 2002 11:44:11 -0000 Mailing-List: contact gdb-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sources.redhat.com Received: (qmail 11747 invoked from network); 23 Jan 2002 11:44:06 -0000 Received: from unknown (HELO fw-cam.cambridge.arm.com) (193.131.176.3) by sources.redhat.com with SMTP; 23 Jan 2002 11:44:06 -0000 Received: by fw-cam.cambridge.arm.com; id LAA17301; Wed, 23 Jan 2002 11:44:04 GMT Received: from unknown(172.16.1.2) by fw-cam.cambridge.arm.com via smap (V5.5) id xma016815; Wed, 23 Jan 02 11:43:40 GMT Received: from cam-mail2.cambridge.arm.com (localhost [127.0.0.1]) by cam-admin0.cambridge.arm.com (8.9.3/8.9.3) with ESMTP id KAA05272; Wed, 23 Jan 2002 10:44:17 GMT Received: from sun18.cambridge.arm.com (sun18.cambridge.arm.com [172.16.2.18]) by cam-mail2.cambridge.arm.com (8.9.3/8.9.3) with ESMTP id KAA11674; Wed, 23 Jan 2002 10:44:16 GMT Message-Id: <200201231044.KAA11674@cam-mail2.cambridge.arm.com> X-Mailer: exmh version 2.0.2 2/24/98 To: Adrian von Bidder cc: gdb mailing list , Richard.Earnshaw@arm.com Reply-To: Richard.Earnshaw@arm.com Organization: ARM Ltd. X-Telephone: +44 1223 400569 (direct+voicemail), +44 1223 400400 (switchbd) X-Fax: +44 1223 400410 X-Address: ARM Ltd., 110 Fulbourn Road, Cherry Hinton, Cambridge CB1 9NJ. X-Url: http://www.arm.com/ Subject: Re: [arm] force gdb into disassembling in thumb (arm) mode In-reply-to: Your message of "23 Jan 2002 10:56:13 +0100." <1011779773.10599.4.camel@atlas> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: quoted-printable Date: Wed, 23 Jan 2002 03:44:00 -0000 From: Richard Earnshaw X-SW-Source: 2002-01/txt/msg00257.txt.bz2 > The sensible way (imho) would be to interpret the (h)alfword/(w)ord > format letters, so that x/ih and x/iw would force to interpret 16/32 bit > instructions. Yes, something like this would be nice. > x/i on an odd address currently does switch to thumb mode - but it seems > to interpret the instructions at the odd address (it doesn't strip the > lsb when loading the data): >=20 > (gdb) x/20i 0xbe1 > 0xbe1: ldrsh r5, [r6, r6] > 0xbe3: strb r6, [r0, r5] > 0xbe5: ldr r4, [pc, #280] (0xd00) > 0xbe7: add sp, #280 > 0xbe9: undefined instruction 0x47b4 > 0xbeb: strh r6, [r0, #2] Hmm, a quick test on the CVS sources shows that using an odd address will=20 DTRT (ie force thumb mode but then round the address down); I can't see=20 anything from the commit log that might have changed. The key is this=20 line of code: gdb/arm-tdep.c/gdb_print_insn_arm() memaddr =3D UNMAKE_THUMB_ADDR (memaddr); Which strips off the thumb bit before actually loading the half-word. R.