Re: SH5 compact register numbering in gcc -> gdb interface - include/elf/sh.h ?

[Elena Zannoni <ezannoni@redhat.com>]

Joern Rennecke writes:
 > To give gcc and gdb a common interface, it is best put into a header file that
 > but
 > gdb/sh-tdep and gcc/config/sh/sh.h (can) include.
 > 
 > I thought of putting it into include/elg/sh.h, since elf is now the predominant
 > object format for SH gcc.  Or should we start something like an include/dwarf
 > directory?
 > But then, it's not strictly dwarf either, since these register numbers are
 > also used for stabs debugging info (in the SH1..SH4 coff toolchain, or if
 > you ask specifically for stabs.)
 > 

I think include/gcc-sh64.h or include/gdb-sh64.h could be OK. Would match the
include/sim-sh64.h file.


 > --- ../include/elf/sh.h	Thu May  9 22:22:18 2002
 > *************** START_RELOC_NUMBERS (elf_sh_reloc_type)
 > *** 218,221 ****
 > --- 218,247 ----
 >     RELOC_NUMBER (R_SH_64_PCREL, 255)
 >   END_RELOC_NUMBERS (R_SH_max)
 >   
 > + enum
 > + {
 > +   SH_DEBUG_INFO_R0 = 0,
 > +   SH_DEBUG_INFO_PR = 17,
 > +   SH_DEBUG_INFO_GBR = 18,
 > +   SH_DEBUG_INFO_MACH_BIG = 20, SH_DEBUG_INFO_MACL, SH_DEBUG_INFO_MACH_LITTLE,

This will break gdb. Register 22 ir SR. What are these registers?
Doesn't SH have only mach and macl?

 > +   SH_DEBUG_INFO_FPUL = 23,
 > +   SH_DEBUG_INFO_FPSCR = 24,
 > +   SH_DEBUG_INFO_FR0 = 25,
 > +   SH_DEBUG_INFO_XD0 = 87
 > + }
 > + 
 > + enum
 > + {
 > +   SH64_DEBUG_INFO_R0 = 0,
 > +   SH64_DEBUG_INFO_TR0 = 68,
 > +   SH64_DEBUG_INFO_FR0 = 77,
 > +   SH64_DEBUG_INFO_T_C = 19,
 > +   SH64_DEBUG_INFO_XF0_C = SH64_DEBUG_INFO_FR0 + 16,
 > +   SH64_DEBUG_INFO_FPUL_C = SH64_DEBUG_INFO_FR0 + 32,
 > +   SH64_DEBUG_INFO_R0_C = 141,
 > +   SH64_DEBUG_INFO_GBR_C = 157,
 > +   SH64_DEBUG_INFO_MACH_C_BIG, SH64_DEBUG_INFO_MACL_C,
 > +   SH64_DEBUG_INFO_MACH_C_LITTLE,
 > +   SH64_DEBUG_INFO_PR_C, SH_DEBUG_INFO_FPSCR_C
 > + };
 >   #endif

What is the advantage of reusing media numbers for compact registers?
This also wouldn't work with the current code, because it is assumed
that the register sets are disjoint. I see that you have made disjoint
the GPRs and that is OK because it will fix some bugs. Might as well
make the whole set distinct. Same question as above about the mach/macl
registers applies here.
Can you expand a bit on that?

thanks
Elena