From: "Tom Taylor" <ttaylor@ateng.com>
To: <gdb@sourceware.cygnus.com>
Subject: PSIM Support for MPC860
Date: Mon, 08 Oct 2001 10:35:00 -0000 [thread overview]
Message-ID: <014301c1501f$a3a3bdf0$7c01a8c0@ateng.com> (raw)
I'm attempting to use the GDB 5.0 PSIM simulator to analyze firmware
written for the MPC860T in the OEA mode. I'm now aware of a
considerable amount of work that I apparently need to do to add at least
a partial simulation of the many added SPR registers, beginning with the
data cache control/status register DC_CST (#568). Due to pre-C0 data
cache bug workarounds, it is not possible to complete even the basic
boot initialization including the DEC register setup without accessing
this SPR.
I have noticed that there is special code for handling problematic
MPC860 forward branches, which is referred to as option_mpc860c0. This
implies to me that at least one person has used the simulator for 860
code, but I'm puzzled because there doesn't appear to be sufficient
support for this to work. Is this because only application code was
being simulated, or is there additional support modules that haven't
been released as part of GDB?
If I undertake the task of adding MPC860 support to PSIM, is there any
interest in the GDB community for simulating this processor, and is
there any available code that could be used to reduce the time and
effort this task will require?
Tom Taylor
Taylor Consulting Services
next reply other threads:[~2001-10-08 10:35 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-10-08 10:35 Tom Taylor [this message]
2001-10-08 12:34 ` Frank Ch. Eigler
2001-10-08 13:53 ` Tom Taylor
2001-10-08 16:42 ` Frank Ch. Eigler
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