From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Tom Taylor" To: Subject: PSIM Support for MPC860 Date: Mon, 08 Oct 2001 10:35:00 -0000 Message-id: <014301c1501f$a3a3bdf0$7c01a8c0@ateng.com> X-SW-Source: 2001-10/msg00078.html I'm attempting to use the GDB 5.0 PSIM simulator to analyze firmware written for the MPC860T in the OEA mode. I'm now aware of a considerable amount of work that I apparently need to do to add at least a partial simulation of the many added SPR registers, beginning with the data cache control/status register DC_CST (#568). Due to pre-C0 data cache bug workarounds, it is not possible to complete even the basic boot initialization including the DEC register setup without accessing this SPR. I have noticed that there is special code for handling problematic MPC860 forward branches, which is referred to as option_mpc860c0. This implies to me that at least one person has used the simulator for 860 code, but I'm puzzled because there doesn't appear to be sufficient support for this to work. Is this because only application code was being simulated, or is there additional support modules that haven't been released as part of GDB? If I undertake the task of adding MPC860 support to PSIM, is there any interest in the GDB community for simulating this processor, and is there any available code that could be used to reduce the time and effort this task will require? Tom Taylor Taylor Consulting Services