ARM SIM - add support to select SWI emulations to support.

ARM SIM - add support to select SWI emulations to support.

[Nick Clifton]

Hi Guys,

  Here is the patch to the ARM simulator that allows the user to
  choose which SWI emulation(s) it will support.  This patch needs a
  seperate patch to the common sim code in order for the stand alone
  simualtor to gain this feature, but it will work right away with
  GDB.

  I am holding off applying this patch until the common part can be
  approved.

Cheers
        Nick


2002-05-17  Nick Clifton  <nickc@cambridge.redhat.com>

	* Makefile.in (SWI_TARGET_SWITCHES): Define.
	* armos.c (swi_mask): Define.  Initialise to supporting all
	SWI emulations.
	(ARMul_OSInit): For XScale targets, only support the ANGEL
	SWI interface.  (This is at the request if Intel).
	(ARMul_OSHandleSWI): Examine swi_mask to see if a particular
        SWI call should be emulated.
	Do not fall through from AngelSWI_Reason_WriteC.
	Propagate exit code from RedBoot Exit SWI.
	* rdi-dgb.h (swi_mask): Prototype.
	(SWI_MASK_DEMON, SWI_MASK_ANGEL, SWI_MASK_REDBOOT): Define.
	* wrapper.c (sim_target_parse_command_line): New function.
	Look for and handle --swi-support switch.
	(sim_target_parse_arg_array): New function.  Process an argv
	array for parsing by sim_target_parse_command_line.
	(sim_target_display_usage): New function.  Describe syntax of
	--swi-suppoort switch.
	(sim_open): Add call to sim_target_parse_arg_array).


Index: Makefile.in
===================================================================
RCS file: /cvs/src/src/sim/arm/Makefile.in,v
retrieving revision 1.3
diff -c -3 -p -w -r1.3 Makefile.in
*** Makefile.in	16 Nov 2001 18:56:01 -0000	1.3
--- Makefile.in	17 May 2002 08:58:54 -0000
***************
*** 18,24 ****
  
  ## COMMON_PRE_CONFIG_FRAG
  
! SIM_EXTRA_CFLAGS = -DMODET -DNEED_UI_LOOP_HOOK
  
  COPRO=@COPRO@
  
--- 18,24 ----
  
  ## COMMON_PRE_CONFIG_FRAG
  
! SIM_EXTRA_CFLAGS = -DMODET -DNEED_UI_LOOP_HOOK -DSIM_TARGET_SWITCHES
  
  COPRO=@COPRO@
  
Index: armos.c
===================================================================
RCS file: /cvs/src/src/sim/arm/armos.c,v
retrieving revision 1.13
diff -c -3 -p -w -r1.13 armos.c
*** armos.c	9 May 2002 10:29:08 -0000	1.13
--- armos.c	17 May 2002 08:58:54 -0000
*************** struct OSblock
*** 125,130 ****
--- 125,134 ----
  #define FIXCRLF(t,c) c
  #endif
  
+ /* Bit mask of enabled SWI implementations.  */
+ unsigned int swi_mask = -1;
+ 
+ 
  static ARMword softvectorcode[] =
  {
    /* Basic: swi tidyexception + event; mov pc, lr;
*************** ARMul_OSInit (ARMul_State * state)
*** 226,231 ****
--- 230,239 ----
  #endif /* VALIDATE */
  #endif /* NOOS */
  
+   /* Intel do not want DEMON SWI support.  */
+    if (state->is_XScale)
+     swi_mask = SWI_MASK_ANGEL;
+  
    return TRUE;
  }
  
*************** SWIflen (ARMul_State * state, ARMword fh
*** 397,445 ****
  unsigned
  ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
  {
-   ARMword          addr;
-   ARMword          temp;
-   ARMword          saved_number = 0;
    struct OSblock * OSptr = (struct OSblock *) state->OSptr;
!   
!   /* Intel do not want DEMON SWI support.  */
!   if (state->is_XScale)
!     switch (number)
!     {
!     case SWI_Read:
!     case SWI_Write:
!     case SWI_Open:
!     case SWI_Clock:
!     case SWI_Time:
!     case SWI_Close:
!     case SWI_Flen:
!     case SWI_Exit:
!     case SWI_Seek:
!     case SWI_WriteC:
!     case SWI_Write0:
!     case SWI_GetErrno:
!     case SWI_GetEnv:
!       saved_number = number;
!       number = -1;
!     default:
!       break;
!     }
    
    switch (number)
      {
      case SWI_Read:
        SWIread (state, state->Reg[0], state->Reg[1], state->Reg[2]);
        break;
  
      case SWI_Write:
        SWIwrite (state, state->Reg[0], state->Reg[1], state->Reg[2]);
        break;
  
      case SWI_Open:
        SWIopen (state, state->Reg[0], state->Reg[1]);
        break;
  
      case SWI_Clock:
        /* Return number of centi-seconds.  */
        state->Reg[0] =
  #ifdef CLOCKS_PER_SEC
--- 405,439 ----
  unsigned
  ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
  {
    struct OSblock * OSptr = (struct OSblock *) state->OSptr;
!   int              unhandled = FALSE;
  
    switch (number)
      {
      case SWI_Read:
+       if (swi_mask & SWI_MASK_DEMON)
  	SWIread (state, state->Reg[0], state->Reg[1], state->Reg[2]);
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_Write:
+       if (swi_mask & SWI_MASK_DEMON)
  	SWIwrite (state, state->Reg[0], state->Reg[1], state->Reg[2]);
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_Open:
+       if (swi_mask & SWI_MASK_DEMON)
  	SWIopen (state, state->Reg[0], state->Reg[1]);
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_Clock:
+       if (swi_mask & SWI_MASK_DEMON)
+ 	{
  	  /* Return number of centi-seconds.  */
  	  state->Reg[0] =
  #ifdef CLOCKS_PER_SEC
*************** ARMul_OSHandleSWI (ARMul_State * state, 
*** 451,499 ****
--- 445,528 ----
  	  (ARMword) (clock () / 10000);
  #endif
  	  OSptr->ErrorNo = errno;
+ 	}
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_Time:
+       if (swi_mask & SWI_MASK_DEMON)
+ 	{
  	  state->Reg[0] = (ARMword) sim_callback->time (sim_callback, NULL);
  	  OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+ 	}
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_Close:
+       if (swi_mask & SWI_MASK_DEMON)
+ 	{
  	  state->Reg[0] = sim_callback->close (sim_callback, state->Reg[0]);
  	  OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+ 	}
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_Flen:
+       if (swi_mask & SWI_MASK_DEMON)
  	SWIflen (state, state->Reg[0]);
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_Exit:
+       if (swi_mask & SWI_MASK_DEMON)
  	state->Emulate = FALSE;
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_Seek:
+       if (swi_mask & SWI_MASK_DEMON)
+ 	{
  	  /* We must return non-zero for failure.  */
  	  state->Reg[0] = -1 >= sim_callback->lseek (sim_callback, state->Reg[0], state->Reg[1], SEEK_SET);
  	  OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+ 	}
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_WriteC:
+       if (swi_mask & SWI_MASK_DEMON)
  	{
  	  char tmp = state->Reg[0];
  	  (void) sim_callback->write_stdout (sim_callback, &tmp, 1);
  	  OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
  	}
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_Write0:
+       if (swi_mask & SWI_MASK_DEMON)
  	SWIWrite0 (state, state->Reg[0]);
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_GetErrno:
+       if (swi_mask & SWI_MASK_DEMON)
  	state->Reg[0] = OSptr->ErrorNo;
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_GetEnv:
+       if (swi_mask & SWI_MASK_DEMON)
+ 	{
  	  state->Reg[0] = ADDRCMDLINE;
  	  if (state->MemSize)
  	    state->Reg[1] = state->MemSize;
*************** ARMul_OSHandleSWI (ARMul_State * state, 
*** 501,506 ****
--- 530,538 ----
  	    state->Reg[1] = ADDRUSERSTACK;
  
  	  WriteCommandLineTo (state, state->Reg[0]);
+ 	}
+       else
+ 	unhandled = TRUE;
        break;
  
      case SWI_Breakpoint:
*************** ARMul_OSHandleSWI (ARMul_State * state, 
*** 511,516 ****
--- 543,553 ----
        /* Handle Angel SWIs as well as Demon ones.  */
      case AngelSWI_ARM:
      case AngelSWI_Thumb:
+       if (swi_mask & SWI_MASK_ANGEL)
+ 	{
+ 	  ARMword addr;
+ 	  ARMword temp;
+ 
  	  /* R1 is almost always a parameter block.  */
  	  addr = state->Reg[1];
  	  /* R0 is a reason code.  */
*************** ARMul_OSHandleSWI (ARMul_State * state, 
*** 552,559 ****
  	    char tmp = ARMul_SafeReadByte (state, addr);
  	    (void) sim_callback->write_stdout (sim_callback, &tmp, 1);
  	    OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
  	  }
- 	  /* Fall thgrough.  */
  
  	case AngelSWI_Reason_Write0:
  	  SWIWrite0 (state, addr);
--- 589,596 ----
  		char tmp = ARMul_SafeReadByte (state, addr);
  		(void) sim_callback->write_stdout (sim_callback, &tmp, 1);
  		OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
+ 		break;
  	      }
  
  	    case AngelSWI_Reason_Write0:
  	      SWIWrite0 (state, addr);
*************** ARMul_OSHandleSWI (ARMul_State * state, 
*** 637,642 ****
--- 674,683 ----
  			ARMul_ReadWord (state, addr + 8));
  	      break;
  	    }
+ 	}
+       else
+ 	unhandled = TRUE;
+       break;
  
      case 0x90:
      case 0x91:
*************** ARMul_OSHandleSWI (ARMul_State * state, 
*** 645,650 ****
--- 686,693 ----
        break;
        
      case 0x180001: /* RedBoot's Syscall SWI in ARM mode.  */
+       if (swi_mask & SWI_MASK_REDBOOT)
+ 	{
  	  switch (state->Reg[0])
  	    {
  	      /* These numbers are defined in libgloss/syscall.h
*************** ARMul_OSHandleSWI (ARMul_State * state, 
*** 652,675 ****
  	     libgloss being installed.  */
  	case 1:  /* Exit.  */
  	  state->Emulate = FALSE;
! 	  return TRUE;
  
  	case 2:  /* Open.  */
  	  SWIopen (state, state->Reg[1], state->Reg[2]);
! 	  return TRUE;
  
  	case 3:  /* Close.  */
  	  state->Reg[0] = sim_callback->close (sim_callback, state->Reg[1]);
  	  OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
! 	  return TRUE;
  
  	case 4:  /* Read.  */
  	  SWIread (state, state->Reg[1], state->Reg[2], state->Reg[3]);
! 	  return TRUE;
  
  	case 5:  /* Write.  */
  	  SWIwrite (state, state->Reg[1], state->Reg[2], state->Reg[3]);
! 	  return TRUE;
  
  	case 6:  /* Lseek.  */
  	  state->Reg[0] = sim_callback->lseek (sim_callback,
--- 695,720 ----
  		 libgloss being installed.  */
  	    case 1:  /* Exit.  */
  	      state->Emulate = FALSE;
! 	      /* Copy exit code into r0.  */
! 	      state->Reg[0] = state->Reg[1];
! 	      break;
  
  	    case 2:  /* Open.  */
  	      SWIopen (state, state->Reg[1], state->Reg[2]);
! 	      break;
  
  	    case 3:  /* Close.  */
  	      state->Reg[0] = sim_callback->close (sim_callback, state->Reg[1]);
  	      OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
! 	      break;
  
  	    case 4:  /* Read.  */
  	      SWIread (state, state->Reg[1], state->Reg[2], state->Reg[3]);
! 	      break;
  
  	    case 5:  /* Write.  */
  	      SWIwrite (state, state->Reg[1], state->Reg[2], state->Reg[3]);
! 	      break;
  
  	    case 6:  /* Lseek.  */
  	      state->Reg[0] = sim_callback->lseek (sim_callback,
*************** ARMul_OSHandleSWI (ARMul_State * state, 
*** 677,689 ****
  					       state->Reg[2],
  					       state->Reg[3]);
  	  OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
! 	  return TRUE;
  
  	case 17: /* Utime.  */
  	  state->Reg[0] = (ARMword) sim_callback->time (sim_callback,
  							(long *) state->Reg[1]);
  	  OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
! 	  return TRUE;
  
  	case 7:  /* Unlink.  */
  	case 8:  /* Getpid.  */
--- 722,734 ----
  						   state->Reg[2],
  						   state->Reg[3]);
  	      OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
! 	      break;
  
  	    case 17: /* Utime.  */
  	      state->Reg[0] = (ARMword) sim_callback->time (sim_callback,
  							    (long *) state->Reg[1]);
  	      OSptr->ErrorNo = sim_callback->get_errno (sim_callback);
! 	      break;
  
  	    case 7:  /* Unlink.  */
  	    case 8:  /* Getpid.  */
*************** ARMul_OSHandleSWI (ARMul_State * state, 
*** 709,722 ****
  	     state->Reg[0]);
  	  return FALSE;
  	}
!       return TRUE;
        
      default:
!       /* If there is a SWI vector installed use it.  */
!       if (state->is_XScale && saved_number != -1)
! 	number = saved_number;
  	    
!       if (SWI_vector_installed && number != SWI_Breakpoint)
  	{
  	  ARMword cpsr;
  	  ARMword i_size;
--- 754,769 ----
  		 state->Reg[0]);
  	      return FALSE;
  	    }
! 	  break;
! 	}
        
      default:
!       unhandled = TRUE;
!     }
        
!   if (unhandled)
!     {
!       if (SWI_vector_installed)
  	{
  	  ARMword cpsr;
  	  ARMword i_size;

Index: dbg_rdi.h
===================================================================
RCS file: /cvs/src/src/sim/arm/dbg_rdi.h,v
retrieving revision 1.1.1.2
diff -c -3 -p -w -r1.1.1.2 dbg_rdi.h
*** dbg_rdi.h	5 Feb 2000 07:30:19 -0000	1.1.1.2
--- dbg_rdi.h	17 May 2002 08:58:54 -0000
*************** struct RDIProcVec
*** 330,332 ****
--- 330,338 ----
  };
  
  #endif
+ 
+ extern unsigned int swi_mask;
+ 
+ #define SWI_MASK_DEMON		(1 << 0)
+ #define SWI_MASK_ANGEL		(1 << 1)
+ #define SWI_MASK_REDBOOT	(1 << 2)

Index: wrapper.c
===================================================================
RCS file: /cvs/src/src/sim/arm/wrapper.c,v
retrieving revision 1.18
diff -c -3 -p -w -r1.18 wrapper.c
*** wrapper.c	18 Mar 2002 21:43:15 -0000	1.18
--- wrapper.c	17 May 2002 08:58:54 -0000
*************** sim_fetch_register (sd, rn, memory, leng
*** 426,431 ****
--- 426,544 ----
    return -1;
  }
  
+ #ifdef SIM_TARGET_SWITCHES
+ 
+ static void sim_target_parse_arg_array PARAMS ((char **));
+ 
+ typedef struct
+ {
+   char * 	swi_option;
+   unsigned int	swi_mask;
+ } swi_options;
+ 
+ #define SWI_SWITCH	"--swi-support"
+ 
+ static swi_options options[] =
+   {
+     { "none",    0 },
+     { "demon",   SWI_MASK_DEMON },
+     { "angel",   SWI_MASK_ANGEL },
+     { "redboot", SWI_MASK_REDBOOT },
+     { "all",     -1 },
+     { "NONE",    0 },
+     { "DEMON",   SWI_MASK_DEMON },
+     { "ANGEL",   SWI_MASK_ANGEL },
+     { "REDBOOT", SWI_MASK_REDBOOT },
+     { "ALL",     -1 }
+   };
+ 
+ 
+ int
+ sim_target_parse_command_line (argc, argv)
+      int argc;
+      char ** argv;
+ {
+   int i;
+ 
+   for (i = 1; i < argc; i++)
+     {
+       char * ptr = argv[i];
+       int arg;
+ 
+       if ((ptr == NULL) || (* ptr != '-'))
+ 	break;
+ 
+       if (strncmp (ptr, SWI_SWITCH, sizeof SWI_SWITCH - 1) != 0)
+ 	continue;
+ 
+       if (ptr[sizeof SWI_SWITCH - 1] == 0)
+ 	{
+ 	  /* Remove this option from the argv array.  */
+ 	  for (arg = i; arg < argc; arg ++)
+ 	    argv[arg] = argv[arg + 1];
+ 	  argc --;
+ 	  
+ 	  ptr = argv[i];
+ 	}
+       else
+ 	ptr += sizeof SWI_SWITCH;
+ 
+       swi_mask = 0;
+       
+       while (* ptr)
+ 	{
+ 	  int i;
+ 
+ 	  for (i = sizeof options / sizeof options[0]; i--;)
+ 	    if (strncmp (ptr, options[i].swi_option,
+ 			 strlen (options[i].swi_option)) == 0)
+ 	      {
+ 		swi_mask |= options[i].swi_mask;
+ 		ptr += strlen (options[i].swi_option);
+ 
+ 		if (* ptr == ',')
+ 		  ++ ptr;
+ 
+ 		break;
+ 	      }
+ 
+ 	  if (i < 0)
+ 	    break;
+ 	}
+ 
+       if (* ptr != 0)
+ 	fprintf (stderr, "Ignoring swi options: %s\n", ptr);
+       
+       /* Remove this option from the argv array.  */
+       for (arg = i; arg < argc; arg ++)
+ 	argv[arg] = argv[arg + 1];
+       argc --;
+       i --;
+     }
+   return argc;
+ }
+ 
+ static void
+ sim_target_parse_arg_array (argv)
+      char ** argv;
+ {
+   int i;
+ 
+   for (i = 0; argv[i]; i++)
+     ;
+ 
+   return (void) sim_target_parse_command_line (i, argv);
+ }
+ 
+ void
+ sim_target_display_usage ()
+ {
+   fprintf (stderr, "%s=<list>  Comma seperated list of SWI protocols to supoport.\n\
+                 This list can contain: NONE, DEMON, ANGEL, REDBOOT and/or ALL.\n",
+ 	   SWI_SWITCH);
+ }
+ #endif
+ 
  SIM_DESC
  sim_open (kind, ptr, abfd, argv)
       SIM_OPEN_KIND kind;
*************** sim_open (kind, ptr, abfd, argv)
*** 438,443 ****
--- 551,560 ----
    myname = (char *) xstrdup (argv[0]);
    sim_callback = ptr;
  
+ #ifdef SIM_TARGET_SWITCHES
+   sim_target_parse_arg_array (argv);
+ #endif
+   
    /* Decide upon the endian-ness of the processor.
       If we can, get the information from the bfd itself.
       Otherwise look to see if we have been given a command

Re: ARM SIM - add support to select SWI emulations to support.

[Richard Earnshaw]

+ 
+ extern unsigned int swi_mask;
+ 
+ #define SWI_MASK_DEMON		(1 << 0)
+ #define SWI_MASK_ANGEL		(1 << 1)
+ #define SWI_MASK_REDBOOT	(1 << 2)


Why make this a mask?  A major part of the problem here is that these SWI 
sets may be mutually incompatible.  Why not just require the user to 
select the right one?

R.

Re: ARM SIM - add support to select SWI emulations to support.

[Richard Earnshaw]

> + 
> + extern unsigned int swi_mask;
> + 
> + #define SWI_MASK_DEMON		(1 << 0)
> + #define SWI_MASK_ANGEL		(1 << 1)
> + #define SWI_MASK_REDBOOT	(1 << 2)
> 
> 
> Why make this a mask?  A major part of the problem here is that these SWI 
> sets may be mutually incompatible.  Why not just require the user to 
> select the right one?

Actually, DEMON and ANGEL are compatible (they were designed to be).  But 
that doesn't make this generally true of all SWI sets that we might want 
to emulate.

The specific case here could be handled by allowing

	--swi=demon
	--swi=angel
	--swi=angel+demon
	--swi=redboot

Note the FPE in the ARMulator requires (a subset of) DEMON SWI support in 
order to be able to handle floating point exceptions.

R.

Re: ARM SIM - add support to select SWI emulations to support.

[Nick Clifton]

Hi Richard,

> + extern unsigned int swi_mask;
> + 
> + #define SWI_MASK_DEMON	(1 << 0)
> + #define SWI_MASK_ANGEL	(1 << 1)
> + #define SWI_MASK_REDBOOT	(1 << 2)
> 
> Why make this a mask?  A major part of the problem here is that
> these SWI sets may be mutually incompatible.

Err really ?  I was under the impression that all three SWI protocols
used completely different number sets and so could be supported
simultaneously.  It certainly looks that way in the ARMul_OSHandleSWI
function.

> Why not just require the user to  select the right one?

The user may need to support more than one protocol and the
user/script setting this option might not know which protocol is going
to be used by a given binary.  For example the current newlib
implementation defaults to using ANGEL, but the libgloss
implementation uses REDBOOT.

Besides there are enough free bits that there is no reason not to be
flexible and provide the ability to support more than one protocol at
the same time.

Cheers
        Nick