From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Andrew Burgess <aburgess@redhat.com>
Cc: Sebastian Huber <sebastian.huber@embedded-brains.de>,
gdb-patches@sourceware.org
Subject: Re: [PATCH 4/4] sim/mips: Recognise a software interrupt request
Date: Wed, 19 Aug 2026 01:03:27 +0100 (BST) [thread overview]
Message-ID: <alpine.DEB.2.21.2608190058350.14132@angie.orcam.me.uk> (raw)
In-Reply-To: <87qzjv1zh3.fsf@redhat.com>
On Tue, 18 Aug 2026, Andrew Burgess wrote:
> Now clearly the `if` block is broken, we're setting PC from the wrong
> place I think.
Yep, the correct one would be ErrorEPC, unimplemented in sim AFAICT just
as proper support for status_ERL, which has numerous implications beyond
just ERET.
Maciej
next prev parent reply other threads:[~2026-08-19 0:03 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-16 23:43 [PATCH 0/4] Fix some MIPS GDB simulator issues Sebastian Huber
2026-08-16 23:43 ` [PATCH 1/4] sim: Allow an overdue event to be descheduled Sebastian Huber
2026-08-18 9:59 ` Andrew Burgess
2026-08-16 23:43 ` [PATCH 2/4] sim/mips: Do not abort on a HI/LO hazard Sebastian Huber
2026-08-18 10:04 ` Andrew Burgess
2026-08-16 23:43 ` [PATCH 3/4] sim/mips: Deliver the reserved instruction exception Sebastian Huber
2026-08-18 10:18 ` Andrew Burgess
2026-08-16 23:43 ` [PATCH 4/4] sim/mips: Recognise a software interrupt request Sebastian Huber
2026-08-18 10:42 ` Andrew Burgess
2026-08-18 11:45 ` Sebastian Huber
2026-08-19 0:03 ` Maciej W. Rozycki [this message]
2026-08-19 0:27 ` Sebastian Huber
2026-08-19 13:17 ` Maciej W. Rozycki
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