From: "Sivanupandi, Pitchumani" <Pitchumani.Sivanupandi@atmel.com>
To: "brobecker@adacore.com" <brobecker@adacore.com>,
Pedro Alves <palves@redhat.com>
Cc: "troth@openavr.org" <troth@openavr.org>,
"gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Subject: RE: [patch] [v2] Enable dwarf unwind for AVR target
Date: Tue, 19 Jan 2016 06:40:00 -0000 [thread overview]
Message-ID: <CAC140656783604CABA6AE60C2A6D5A4CA3BC1CB@penmbx02.corp.atmel.com> (raw)
Ping!
> -----Original Message-----
> From: Sivanupandi, Pitchumani
> Sent: 08 January 2016 14:23
> To: 'brobecker@adacore.com' <brobecker@adacore.com>; 'Pedro Alves'
> <palves@redhat.com>
> Cc: 'troth@openavr.org' <troth@openavr.org>; 'gdb-patches@sourceware.org'
> <gdb-patches@sourceware.org>
> Subject: [patch] [v2] Enable dwarf unwind for AVR target
>
> Previous patch and discussion is here:
> https://sourceware.org/ml/gdb-patches/2016-01/msg00027.html
>
> Test case: step over on function call statements (e.g. break.exp)
>
> Need for dwarf unwind:
> Current AVR frame unwind analyzes only the prologue and stack unwind becomes
> unreliable. CFA info from dwarf debug information can be used to unwind the
> stack pointer and PC reliably.
>
> Attached patch (updated, v2) enables the dwarf unwinder for avr target.
>
> Fix:
> Dwarf debug info generated by avr-gcc denotes the return address by register
> 36 which is not an actual register.
> e.g. .debug_frame
> (--snip--)
> 00000000 00000010 ffffffff CIE
> Version: 1
> Augmentation: ""
> Code alignment factor: 2
> Data alignment factor: -1
> Return address column: 36
>
> DW_CFA_def_cfa: r32 ofs 3
> DW_CFA_offset: r36 at cfa-2
> (--snip--)
>
> The fix is to add a pseudo register (36 - AVR_DWARF2_PC_REGNUM/LR) to gdb to
> map return address register. Register name is "LR" (link register). When
> dwarf frame unwind asks for PC, target function will read return address
> value from AVR_DWARF2_PC_REGNUM's CFA address.
>
> Target function avr_dwarf2_prev_register implementation is similar to
> existing avr_frame_prev_register function.
>
> Note:
> * AVR_DWARF2_PC_REGNUM is meant only to unwind PC. Also we can't expect
> stack at all times (e.g. startup code) to read/write into that pseudo
> register. So, the pseudo register read will return that register unavailable
> and write will not do anything.
> * Added extern function dwarf2_frame_addr to dwarf2-frame.c to find the
> frame address for argument register from dwarf frame cache.
> * Dwarf2 address size set to 4 (Ref: DWARF2_ADDR_SIZE from avr-gcc).
>
> Ran GDB regression tests with Atmel internal simulator (atmega2560). No new
> regressions found.
>
> Is this patch OK?
>
> Regards,
> Pitchumani
>
> gdb/ChangeLog
> * avr-tdep.c: Include dwarf2-frame.h
> (enum): Add new pseudo register AVR_DWARF2_PC_REGNUM (36).
> Update number of pseudo registers (AVR_NUM_PSEUDO_REGS).
> (avr_register_name): Add LR as register name for new pseudo register.
> (avr_register_type): return pc type for new register.
> (avr_pseudo_register_read): return that register unavailable for new
> pseudo register.
> (avr_pseudo_register_write): do nothing as new pseudo register is read-
> only.
> (avr_dwarf2_prev_register): New function to unwind prev register.
> (avr_dwarf_reg_to_regnum): Allow all valid pseudo registers.
> (avr_dwarf2_frame_init_reg): Initialize pseudo registers handler.
> (avr_gdbarch_init): Set dwarf2 address size.
> Set register state init function.
> Add dwarf2 unwinders to the unwinders list.
> * dwarf2-frame.c (dwarf2_frame_addr): New function that returns CFA for
> argument register.
> * dwarf2-frame.h: Add prototype for new function.
next reply other threads:[~2016-01-19 6:40 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-19 6:40 Sivanupandi, Pitchumani [this message]
-- strict thread matches above, loose matches on Subject: below --
2016-01-08 8:53 Sivanupandi, Pitchumani
2016-02-03 16:45 ` Kevin Buettner
2016-02-17 5:51 ` Pitchumani Sivanupandi
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