From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 8355 invoked by alias); 19 Jan 2016 06:40:24 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 8342 invoked by uid 89); 19 Jan 2016 06:40:23 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 spammy=AVR, snip, asks, cfa X-HELO: eusmtp01.atmel.com Received: from eusmtp01.atmel.com (HELO eusmtp01.atmel.com) (212.144.249.243) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 19 Jan 2016 06:40:22 +0000 Received: from apsmtp01.atmel.com (10.168.254.31) by eusmtp01.atmel.com (10.161.101.31) with Microsoft SMTP Server id 14.3.235.1; Tue, 19 Jan 2016 07:40:14 +0100 Received: from PENCHT01.corp.atmel.com (10.168.5.161) by apsmtp01.atmel.com (10.168.254.31) with Microsoft SMTP Server (TLS) id 14.3.235.1; Tue, 19 Jan 2016 14:42:32 +0800 Received: from penmbx02.corp.atmel.com ([fe80::b4e4:e0f6:b17c:e55f]) by PENCHT01.corp.atmel.com ([fe80::95df:d3d0:4452:28e3%12]) with mapi id 14.03.0235.001; Tue, 19 Jan 2016 14:40:17 +0800 From: "Sivanupandi, Pitchumani" To: "brobecker@adacore.com" , Pedro Alves CC: "troth@openavr.org" , "gdb-patches@sourceware.org" Subject: RE: [patch] [v2] Enable dwarf unwind for AVR target Date: Tue, 19 Jan 2016 06:40:00 -0000 Message-ID: Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-SW-Source: 2016-01/txt/msg00410.txt.bz2 Ping! > -----Original Message----- > From: Sivanupandi, Pitchumani > Sent: 08 January 2016 14:23 > To: 'brobecker@adacore.com' ; 'Pedro Alves' > > Cc: 'troth@openavr.org' ; 'gdb-patches@sourceware.org' > > Subject: [patch] [v2] Enable dwarf unwind for AVR target >=20 > Previous patch and discussion is here: > https://sourceware.org/ml/gdb-patches/2016-01/msg00027.html >=20 > Test case: step over on function call statements (e.g. break.exp) >=20 > Need for dwarf unwind: > Current AVR frame unwind analyzes only the prologue and stack unwind beco= mes > unreliable. CFA info from dwarf debug information can be used to unwind t= he > stack pointer and PC reliably. >=20 > Attached patch (updated, v2) enables the dwarf unwinder for avr target. >=20 > Fix: > Dwarf debug info generated by avr-gcc denotes the return address by regis= ter > 36 which is not an actual register. > e.g. .debug_frame > (--snip--) > 00000000 00000010 ffffffff CIE > Version: 1 > Augmentation: "" > Code alignment factor: 2 > Data alignment factor: -1 > Return address column: 36 >=20 > DW_CFA_def_cfa: r32 ofs 3 > DW_CFA_offset: r36 at cfa-2 > (--snip--) >=20 > The fix is to add a pseudo register (36 - AVR_DWARF2_PC_REGNUM/LR) to gdb= to > map return address register. Register name is "LR" (link register). When > dwarf frame unwind asks for PC, target function will read return address > value from AVR_DWARF2_PC_REGNUM's CFA address. >=20 > Target function avr_dwarf2_prev_register implementation is similar to > existing avr_frame_prev_register function. >=20 > Note: > * AVR_DWARF2_PC_REGNUM is meant only to unwind PC. Also we can't expect > stack at all times (e.g. startup code) to read/write into that pseudo > register. So, the pseudo register read will return that register unavaila= ble > and write will not do anything. > * Added extern function dwarf2_frame_addr to dwarf2-frame.c to find the > frame address for argument register from dwarf frame cache. > * Dwarf2 address size set to 4 (Ref: DWARF2_ADDR_SIZE from avr-gcc). >=20 > Ran GDB regression tests with Atmel internal simulator (atmega2560). No n= ew > regressions found. >=20 > Is this patch OK? >=20 > Regards, > Pitchumani >=20 > gdb/ChangeLog > * avr-tdep.c: Include dwarf2-frame.h > (enum): Add new pseudo register AVR_DWARF2_PC_REGNUM (36). > Update number of pseudo registers (AVR_NUM_PSEUDO_REGS). > (avr_register_name): Add LR as register name for new pseudo register. > (avr_register_type): return pc type for new register. > (avr_pseudo_register_read): return that register unavailable for new > pseudo register. > (avr_pseudo_register_write): do nothing as new pseudo register is read- > only. > (avr_dwarf2_prev_register): New function to unwind prev register. > (avr_dwarf_reg_to_regnum): Allow all valid pseudo registers. > (avr_dwarf2_frame_init_reg): Initialize pseudo registers handler. > (avr_gdbarch_init): Set dwarf2 address size. > Set register state init function. > Add dwarf2 unwinders to the unwinders list. > * dwarf2-frame.c (dwarf2_frame_addr): New function that returns CFA for > argument register. > * dwarf2-frame.h: Add prototype for new function.