From: paawan oza <paawan1982@yahoo.com>
To: Michael Snyder <msnyder@vmware.com>
Cc: Hui Zhu <teawater@gmail.com>,
"gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Subject: Re: final i386.floating.record.patch
Date: Fri, 07 Aug 2009 07:25:00 -0000 [thread overview]
Message-ID: <919551.75637.qm@web112511.mail.gq1.yahoo.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 2123 bytes --]
Hi Hui & Michael,
Now we revert status registers also.
please find the patch attached.
I am sorry, if I am not pasting the patch in email-body due to tabs&spaces problem faced by Michael last time.
Regards,
Oza.
--- On Wed, 8/5/09, Michael Snyder <msnyder@vmware.com> wrote:
> From: Michael Snyder <msnyder@vmware.com>
> Subject: Re: final i386.floating.record.patch
> To: "paawan oza" <paawan1982@yahoo.com>
> Cc: "Hui Zhu" <teawater@gmail.com>, "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
> Date: Wednesday, August 5, 2009, 7:03 AM
> paawan oza wrote:
> > Hi Hui,
> >
> > please find my analysis as follows.
> >
> > following are the registers which you may find it
> different.
> >
> > fstat
> > ftag
> > fiseg
> > fioff
> > foseg
> > fooff
> > fop
> >
> > In my opinion, we do not need to record all these
> registers. because these registers are purly depends on
> instruction's execution status in FPU unit.
> >
> >
> > for e.g.
> > fop register stores te last opcode executed by x87 FPU
> unit.
> > fstat register may contain c0, c1, c2, c3 flag
> status...
> >
> > why we dont need to record, because even if we reply
> the recod...
> > Anyway these register are going to be change by FPU HW
> unit based on any fp insn's nature and its execution. (next
> insn which FPU is going to execute)
> >
> > so it doesnt make much sense to store it, because even
> if we restore it, FPU unit doesnt use them directly, but FPU
> HW sets them after executing current fp insn. so anyway they
> are going to reset as soon as FPU executes next insn.
> >
> > but still if you feel that we must record those
> registers because user might want to observe those
> registers, then I can do that.
> >
> > please let me know you opinion about it.
>
> It may be that saving the registers is not purely
> necessary, but
> we are not just a simulator -- we are a debugger. The
> user might
> be confused if he steps backward and sees that the register
> did not
> change.
>
> So I think we should preserve it and revert it.
>
>
[-- Attachment #2: i386.record.float.aug-07.patch --]
[-- Type: application/octet-stream, Size: 14374 bytes --]
diff -urN ./gdb.orig/i386-tdep.c gdb.new/i386-tdep.c
--- ./gdb.orig/i386-tdep.c 2009-07-12 13:46:21.000000000 -0400
+++ gdb.new/i386-tdep.c 2009-08-07 12:32:58.000000000 -0400
@@ -3139,6 +3139,74 @@
return 0;
}
+
+/* Defines contents to record. */
+#define I386_SAVE_FPU_REGS 0xfffd
+#define I386_SAVE_FPU_ENV 0xfffe
+#define I386_SAVE_FPU_ENV_REG_STACK 0xffff
+
+/* Record the value of floating point registers which will be changed by the
+ current instruction to "record_arch_list". Return -1 if something is wrong.
+*/
+
+static int i386_record_floats (struct gdbarch *gdbarch,
+ struct i386_record_s *ir,
+ uint32_t iregnum)
+{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ int i;
+
+ /* Oza: Because of floating point insn push/pop of fpu stack is going to
+ happen. Currently we store st0-st7 registers, but we need not store all
+ registers all the time, in future we use ftag register and record only
+ those who are not marked as an empty. */
+
+ if (I386_SAVE_FPU_REGS == iregnum)
+ {
+ for (i = I387_ST0_REGNUM (tdep); i <= I387_ST0_REGNUM (tdep) + 7; i++)
+ {
+ if (record_arch_list_add_reg (ir->regcache, i))
+ return -1;
+ }
+ }
+ else if (I386_SAVE_FPU_ENV == iregnum)
+ {
+ for (i = I387_FCTRL_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
+ {
+ if (record_arch_list_add_reg (ir->regcache, i))
+ return -1;
+ }
+ }
+ else if (I386_SAVE_FPU_ENV_REG_STACK == iregnum)
+ {
+ for (i = I387_ST0_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
+ {
+ if (record_arch_list_add_reg (ir->regcache, i))
+ return -1;
+ }
+ }
+ else if ((iregnum >= I387_ST0_REGNUM (tdep)) &&
+ (iregnum <= I387_FOP_REGNUM (tdep)))
+ {
+ if (record_arch_list_add_reg (ir->regcache,iregnum))
+ return -1;
+ }
+ else
+ {
+ /* Parameter error. */
+ return -1;
+ }
+ if(I386_SAVE_FPU_ENV != iregnum)
+ {
+ for (i = I387_FCTRL_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++)
+ {
+ if (record_arch_list_add_reg (ir->regcache, i))
+ return -1;
+ }
+ }
+ return 0;
+}
+
/* Parse the current instruction and record the values of the registers and
memory that will be changed in current instruction to "record_arch_list".
Return -1 if something wrong. */
@@ -3153,6 +3221,7 @@
uint32_t tmpu32;
uint32_t opcode;
struct i386_record_s ir;
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
memset (&ir, 0, sizeof (struct i386_record_s));
ir.regcache = regcache;
@@ -4188,8 +4257,7 @@
}
break;
- /* floats */
- /* It just record the memory change of instrcution. */
+ /* Floats. */
case 0xd8:
case 0xd9:
case 0xda:
@@ -4203,45 +4271,56 @@
ir.reg |= ((opcode & 7) << 3);
if (ir.mod != 3)
{
- /* memory */
+ /* Memory. */
uint32_t addr;
if (i386_record_lea_modrm_addr (&ir, &addr))
return -1;
switch (ir.reg)
{
- case 0x00:
- case 0x01:
case 0x02:
+ case 0x12:
+ case 0x22:
+ case 0x32:
+ /* For fcom, ficom nothing to do. */
+ break;
case 0x03:
+ case 0x13:
+ case 0x23:
+ case 0x33:
+ /* For fcomp, ficomp pop FPU stack, store all. */
+ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ break;
+ case 0x00:
+ case 0x01:
case 0x04:
case 0x05:
case 0x06:
case 0x07:
case 0x10:
case 0x11:
- case 0x12:
- case 0x13:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
case 0x20:
case 0x21:
- case 0x22:
- case 0x23:
case 0x24:
case 0x25:
case 0x26:
case 0x27:
case 0x30:
case 0x31:
- case 0x32:
- case 0x33:
case 0x34:
case 0x35:
case 0x36:
case 0x37:
+ /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
+ fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension
+ of code, always affects st(0) register. */
+ if (i386_record_floats (gdbarch, &ir, I387_ST0_REGNUM (tdep)))
+ return -1;
break;
case 0x08:
case 0x0a:
@@ -4250,6 +4329,7 @@
case 0x19:
case 0x1a:
case 0x1b:
+ case 0x1d:
case 0x28:
case 0x29:
case 0x2a:
@@ -4258,9 +4338,14 @@
case 0x39:
case 0x3a:
case 0x3b:
+ case 0x3c:
+ case 0x3d:
switch (ir.reg & 7)
{
case 0:
+ /* Handling fld, fild. */
+ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
break;
case 1:
switch (ir.reg >> 4)
@@ -4274,6 +4359,7 @@
return -1;
break;
case 3:
+ break;
default:
if (record_arch_list_add_mem (addr, 2))
return -1;
@@ -4284,15 +4370,49 @@
switch (ir.reg >> 4)
{
case 0:
+ if (record_arch_list_add_mem (addr, 4))
+ return -1;
+ if (3 == (ir.reg & 7))
+ {
+ /* For fstp m32fp. */
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ break;
case 1:
if (record_arch_list_add_mem (addr, 4))
return -1;
+ if ((3 == (ir.reg & 7))
+ || (5 == (ir.reg & 7))
+ || (7 == (ir.reg & 7)))
+ {
+ /* For fstp insn. */
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_REGS))
+ return -1;
+ }
break;
case 2:
if (record_arch_list_add_mem (addr, 8))
return -1;
+ if (3 == (ir.reg & 7))
+ {
+ /* For fstp m64fp. */
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_REGS))
+ return -1;
+ }
break;
case 3:
+ if ((3 <= (ir.reg & 7)) && (6 <= (ir.reg & 7)))
+ {
+ /* For fistp, fbld, fild, fbstp. */
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ /* Fall through */
default:
if (record_arch_list_add_mem (addr, 2))
return -1;
@@ -4302,11 +4422,21 @@
}
break;
case 0x0c:
+ /* Insn fldenv. */
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_ENV_REG_STACK))
+ return -1;
+ break;
case 0x0d:
- case 0x1d:
+ /* Insn fldcw. */
+ if (i386_record_floats (gdbarch, &ir, I387_FCTRL_REGNUM (tdep)))
+ return -1;
+ break;
case 0x2c:
- case 0x3c:
- case 0x3d:
+ /* Insn frstor. */
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_ENV_REG_STACK))
+ return -1;
break;
case 0x0e:
if (ir.dflag)
@@ -4329,6 +4459,9 @@
case 0x3e:
if (record_arch_list_add_mem (addr, 10))
return -1;
+ /* Insn fstp, fbstp. */
+ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
break;
case 0x2e:
if (ir.dflag)
@@ -4345,10 +4478,17 @@
}
if (record_arch_list_add_mem (addr, 80))
return -1;
+ /* Insn fsave. */
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_ENV_REG_STACK))
+ return -1;
break;
case 0x3f:
if (record_arch_list_add_mem (addr, 8))
return -1;
+ /* Ins fistp. */
+ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
break;
default:
ir.addr -= 2;
@@ -4357,8 +4497,211 @@
break;
}
}
+ /* Opcode is an extension of modR/M byte. */
+ else
+ {
+ switch (opcode)
+ {
+ case 0xd8:
+ if (i386_record_floats (gdbarch, &ir, I387_ST0_REGNUM (tdep)))
+ return -1;
+ break;
+ case 0xd9:
+ if (0x0c == (ir.modrm >> 4))
+ {
+ if ((ir.modrm & 0x0f) <= 7)
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ else
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep)))
+ return -1;
+ /* If only st(0) is changing, then we have already
+ recorded. */
+ if ((ir.modrm & 0x0f) - 0x08)
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep) +
+ ((ir.modrm & 0x0f) - 0x08)))
+ return -1;
+ }
+ }
+ }
+ else
+ {
+ switch (ir.modrm)
+ {
+ case 0xe0:
+ case 0xe1:
+ case 0xf0:
+ case 0xf5:
+ case 0xf8:
+ case 0xfa:
+ case 0xfc:
+ case 0xfe:
+ case 0xff:
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep)))
+ return -1;
+ break;
+ case 0xf1:
+ case 0xf2:
+ case 0xf3:
+ case 0xf4:
+ case 0xf6:
+ case 0xf7:
+ case 0xe8:
+ case 0xe9:
+ case 0xea:
+ case 0xeb:
+ case 0xec:
+ case 0xed:
+ case 0xee:
+ case 0xf9:
+ case 0xfb:
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_REGS))
+ return -1;
+ break;
+ case 0xfd:
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep)))
+ return -1;
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep) + 1))
+ return -1;
+ break;
+ }
+ }
+ break;
+ case 0xda:
+ if (0xe9 == ir.modrm)
+ {
+ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ else if ((0x0c == ir.modrm >> 4) || (0x0d == ir.modrm >> 4))
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep)))
+ return -1;
+ if (((ir.modrm & 0x0f) > 0) && ((ir.modrm & 0x0f) <= 7))
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep) +
+ (ir.modrm & 0x0f)))
+ return -1;
+ }
+ else if ((ir.modrm & 0x0f) - 0x08)
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep) +
+ ((ir.modrm & 0x0f) - 0x08)))
+ return -1;
+ }
+ }
+ break;
+ case 0xdb:
+ if (0xe3 == ir.modrm)
+ {
+ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_ENV))
+ return -1;
+ }
+ else if ((0x0c == ir.modrm >> 4) || (0x0d == ir.modrm >> 4))
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep)))
+ return -1;
+ if (((ir.modrm & 0x0f) > 0) && ((ir.modrm & 0x0f) <= 7))
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep) +
+ (ir.modrm & 0x0f)))
+ return -1;
+ }
+ else if ((ir.modrm & 0x0f) - 0x08)
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep) +
+ ((ir.modrm & 0x0f) - 0x08)))
+ return -1;
+ }
+ }
+ break;
+ case 0xdc:
+ if ((0x0c == ir.modrm >> 4)
+ || (0x0d == ir.modrm >> 4)
+ || (0x0f == ir.modrm >> 4))
+ {
+ if ((ir.modrm & 0x0f) <= 7)
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep) +
+ (ir.modrm & 0x0f)))
+ return -1;
+ }
+ else
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep) +
+ ((ir.modrm & 0x0f) - 0x08)))
+ return -1;
+ }
+ }
+ break;
+ case 0xdd:
+ if (0x0c == ir.modrm >> 4)
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_FTAG_REGNUM (tdep)))
+ return -1;
+ }
+ else if ((0x0d == ir.modrm >> 4) || (0x0e == ir.modrm >> 4))
+ {
+ if ((ir.modrm & 0x0f) <= 7)
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I387_ST0_REGNUM (tdep) +
+ (ir.modrm & 0x0f)))
+ return -1;
+ }
+ else
+ {
+ if (i386_record_floats (gdbarch, &ir,
+ I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ }
+ break;
+ case 0xde:
+ if ((0x0c == ir.modrm >> 4)
+ || (0x0e == ir.modrm >> 4)
+ || (0x0f == ir.modrm >> 4)
+ || (0xd9 == ir.modrm))
+ {
+ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ break;
+ case 0xdf:
+ if (0xe0 == ir.modrm)
+ {
+ if (record_arch_list_add_reg (ir.regcache, I386_EAX_REGNUM))
+ return -1;
+ }
+ else if ((0x0f == ir.modrm >> 4) || (0x0e == ir.modrm >> 4))
+ {
+ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS))
+ return -1;
+ }
+ break;
+ }
+ }
break;
-
/* string ops */
/* movsS */
case 0xa4:
@@ -4775,12 +5118,18 @@
break;
/* fwait */
- /* XXX */
case 0x9b:
- printf_unfiltered (_("Process record doesn't support instruction "
- "fwait.\n"));
- ir.addr -= 1;
- goto no_support;
+ if (target_read_memory (ir.addr, &tmpu8, 1))
+ {
+ if (record_debug)
+ printf_unfiltered (_("Process record: error reading memory at "
+ "addr 0x%s len = 1.\n"),
+ paddress (gdbarch, ir.addr));
+ return -1;
+ }
+ opcode = (uint32_t) tmpu8;
+ ir.addr++;
+ goto reswitch;
break;
/* int3 */
next reply other threads:[~2009-08-07 7:17 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-07 7:25 paawan oza [this message]
2009-08-07 15:50 ` Hui Zhu
2009-08-16 21:41 ` Michael Snyder
2009-08-17 9:17 ` Hui Zhu
2009-08-17 16:16 ` paawan oza
-- strict thread matches above, loose matches on Subject: below --
2009-08-21 16:59 paawan oza
2009-08-23 1:32 ` Hui Zhu
2009-08-23 3:00 ` Michael Snyder
2009-08-23 9:04 ` paawan oza
2009-08-23 9:29 ` paawan oza
2009-09-09 0:19 ` Michael Snyder
2009-09-10 1:13 ` paawan oza
2009-09-26 9:33 ` paawan oza
2009-12-10 7:55 ` Hui Zhu
2009-08-18 15:22 paawan oza
2009-08-19 2:17 ` Hui Zhu
2009-08-19 2:44 ` Hui Zhu
2009-08-04 13:06 paawan oza
2009-08-04 13:58 ` Hui Zhu
2009-08-04 14:18 ` paawan oza
2009-08-04 14:26 ` paawan oza
2009-08-04 14:43 ` Hui Zhu
2009-08-04 17:59 ` paawan oza
2009-08-05 1:29 ` Hui Zhu
2009-08-05 1:34 ` Michael Snyder
2009-08-05 13:48 ` paawan oza
2009-08-03 14:56 paawan oza
2009-08-03 20:04 ` Michael Snyder
2009-08-04 3:20 ` Hui Zhu
2009-08-04 13:03 ` paawan oza
2009-07-29 18:34 paawan oza
2009-07-30 6:24 ` Michael Snyder
2009-07-30 18:09 ` paawan oza
2009-08-03 14:59 ` paawan oza
2009-08-03 20:07 ` Michael Snyder
2009-07-27 1:09 i386.record.floating.point.patch : with more testing and assurity Michael Snyder
2009-07-29 18:30 ` final i386.floating.record.patch paawan oza
2009-07-29 22:01 ` Michael Snyder
2009-07-30 0:44 ` Michael Snyder
2009-07-30 18:00 ` paawan oza
2009-07-30 21:13 ` Michael Snyder
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