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From: Tom Tromey <tom@tromey.com>
To: Anton Blanchard <antonb@tenstorrent.com>
Cc: gdb-patches@sourceware.org
Subject: Re: [PATCH] RISC-V: Use hardware single step when available
Date: Wed, 16 Sep 2026 09:04:07 -0600	[thread overview]
Message-ID: <87tsnputjs.fsf@tromey.com> (raw)
In-Reply-To: <20260916002831.1775922-1-antonb@tenstorrent.com> (Anton Blanchard's message of "Wed, 16 Sep 2026 00:28:31 +0000")

>>>>> "Anton" == Anton Blanchard <antonb@tenstorrent.com> writes:

Anton> If the target supports hardware single-stepping use it instead of
Anton> inserting software breakpoints. We continue to use software breakpoints
Anton> for stepping over LR/SC atomic sequences.

I'm definitely not the person to review RISC-V bugs.

That said, I'm curious about two things.

First, if the target advertises that it can single-step, should that
include stepping over atomic sequences?  IOW could this also be deferred
to, say, gdbserver to handle properly?

Second, I wonder why target_can_do_single_step isn't called at some
higher level.

Anyway I see that arm-linux-tdep.c -- but not arm-tdep.c,
mysteriously -- does what you've done here.  And I don't have any
objection or anything, just questions.

Tom

      reply	other threads:[~2026-09-16 15:04 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-16  0:28 Anton Blanchard
2026-09-16 15:04 ` Tom Tromey [this message]

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