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Received: from 75-166-229-74.hlrn.qwest.net ([75.166.229.74]:53924 helo=bapiya) by box5379.bluehost.com with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.100) (envelope-from ) id 1x6rBA-00000002fDx-28G4; Wed, 16 Sep 2026 09:04:08 -0600 From: Tom Tromey To: Anton Blanchard Cc: gdb-patches@sourceware.org Subject: Re: [PATCH] RISC-V: Use hardware single step when available In-Reply-To: <20260916002831.1775922-1-antonb@tenstorrent.com> (Anton Blanchard's message of "Wed, 16 Sep 2026 00:28:31 +0000") References: <20260916002831.1775922-1-antonb@tenstorrent.com> X-Attribution: Tom Date: Wed, 16 Sep 2026 09:04:07 -0600 Message-ID: <87tsnputjs.fsf@tromey.com> User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 Content-Type: text/plain X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - box5379.bluehost.com X-AntiAbuse: Original Domain - sourceware.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - tromey.com X-BWhitelist: no X-Source-IP: 75.166.229.74 X-Source-L: No X-Exim-ID: 1x6rBA-00000002fDx-28G4 X-Source: X-Source-Args: X-Source-Dir: X-Source-Sender: 75-166-229-74.hlrn.qwest.net (bapiya) [75.166.229.74]:53924 X-Source-Auth: tom+tromey.com X-Email-Count: 2 X-Org: HG=bhshared;ORG=bluehost; X-Source-Cap: ZWx5bnJvYmk7ZWx5bnJvYmk7Ym94NTM3OS5ibHVlaG9zdC5jb20= X-Local-Domain: yes X-CMAE-Envelope: MS4xfOhDa5ac4X7VDm3LFdwCBeF1eLby4zG4C8FIlu9+FHS7Pep/GZaeQbd9P+RCu1/8/4MVQSw9G5v/edJXhnQ7bwASQ+sH17VWU6IqHvg7+cCXZuWGVBNr lqfNuwRm05QpTw2DblqasMwAGASJss1+O/n0oZhatZaamb0ZKYIRFluyHYh6yToC/iurLOIlvxeNnulVQB4gvyhkZUJOwUO1rJM= X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org >>>>> "Anton" == Anton Blanchard writes: Anton> If the target supports hardware single-stepping use it instead of Anton> inserting software breakpoints. We continue to use software breakpoints Anton> for stepping over LR/SC atomic sequences. I'm definitely not the person to review RISC-V bugs. That said, I'm curious about two things. First, if the target advertises that it can single-step, should that include stepping over atomic sequences? IOW could this also be deferred to, say, gdbserver to handle properly? Second, I wonder why target_can_do_single_step isn't called at some higher level. Anyway I see that arm-linux-tdep.c -- but not arm-tdep.c, mysteriously -- does what you've done here. And I don't have any objection or anything, just questions. Tom