From: Andrew Burgess via Gdb-patches <gdb-patches@sourceware.org>
To: gdb-patches@sourceware.org
Subject: Re: [PATCH 0/3] RISC-V fflags, frm, and fcsr (includes small tdesc change)
Date: Wed, 31 Aug 2022 16:33:54 +0100 [thread overview]
Message-ID: <87r10wctr1.fsf@redhat.com> (raw)
In-Reply-To: <cover.1660644464.git.aburgess@redhat.com>
Andrew Burgess <aburgess@redhat.com> writes:
> While testing on a RISC-V native Linux target, I noticed some issues
> accessing the fflags and frm registers. This series addresses these issues.
>
> Patch #2 is a small extension to the target description mechanism
> required to support patch #3.
I've now pushed this series.
Thanks,
Andrew
prev parent reply other threads:[~2022-08-31 15:34 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-16 10:09 Andrew Burgess via Gdb-patches
2022-08-16 10:09 ` [PATCH 1/3] gdb/riscv: improve (and fix) display of frm field in 'info registers' Andrew Burgess via Gdb-patches
2022-08-16 10:09 ` [PATCH 2/3] gdb: Add tdesc_found_register function to tdesc API Andrew Burgess via Gdb-patches
2022-08-16 10:09 ` [PATCH 3/3] gdb/riscv: better support for fflags and frm registers Andrew Burgess via Gdb-patches
2022-08-31 15:11 ` Andrew Burgess via Gdb-patches
2022-08-16 16:26 ` [PATCH 0/3] RISC-V fflags, frm, and fcsr (includes small tdesc change) John Baldwin
2022-08-31 15:33 ` Andrew Burgess via Gdb-patches [this message]
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