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From: Andrew Burgess <aburgess@redhat.com>
To: Charlie Jenkins <charlie@rivosinc.com>, Sameer Natu <snatu@whileone.in>
Cc: gdb-patches@sourceware.org
Subject: Re: [PATCH v5] RISC-V: support for vector register accesses via ptrace() in RISC-V Linux native
Date: Wed, 18 Jun 2025 16:28:38 +0100	[thread overview]
Message-ID: <87jz59kr15.fsf@redhat.com> (raw)
In-Reply-To: <aFH9kyDGSwMrRo1w@ghost>

Charlie Jenkins <charlie@rivosinc.com> writes:

> On Thu, May 15, 2025 at 10:50:37AM -0700, Charlie Jenkins wrote:
>> On Wed, May 07, 2025 at 02:16:23PM -0700, Charlie Jenkins wrote:
>> > On Wed, May 07, 2025 at 11:57:09AM +0000, Sameer Natu wrote:
>> > > From: Sameer Natu <snatu@whileone.in>
>> > > 
>> > > Add vector registers and CSRs
>> > > 
>> > > Co-Authored-By: Greg Savin <greg.savin@sifive.com>
>> > Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
>> > Tested-by: Charlie Jenkins <charlie@rivosinc.com>
>> > 
>> > Andrew, please let us know your feedback!
>> 
>> Just pinging this thread in case it got lost.
>
> Andrew, it would be great to have this merged in. Do you have concerns
> with this patch?

I'll try to take a look at this patch this week.

Thanks,
Andrew


  reply	other threads:[~2025-06-18 15:29 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-07 11:57 Sameer Natu
2025-05-07 21:16 ` Charlie Jenkins
2025-05-15 17:50   ` Charlie Jenkins
2025-06-17 23:43     ` Charlie Jenkins
2025-06-18 15:28       ` Andrew Burgess [this message]
2025-06-19 17:27 ` Andrew Burgess

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