Re: [PATCH 1/2] sim: h8300 Fixed different behavior in preinc/predec.

[Yoshinori Sato <ysato@users.sourceforge.jp>]

On Sat, 22 May 2021 07:41:32 +0900,
Mike Frysinger wrote:
> 
> On 21 May 2021 23:16, Yoshinori Sato wrote:
> > Fixed some addressing modes not working properly on the h8300.
> > I have confirmed in the test case that the result is
> > the same as the actual CPU.
> 
> are there testcases that cover this behavior ?  if not, can you add some ?

Yes. 2/2 changes include this case.

> > --- a/sim/h8300/compile.c
> > +++ b/sim/h8300/compile.c
> > @@ -1098,6 +1098,35 @@ decode (SIM_DESC sd, int addr, unsigned char *data, decoded_inst *dst)
> >  		      /* End of Processing for system calls.  */
> >  		    }
> >  
> > +		  /* Use same register is specified for source
> > +		     and destination.
> > +		     the value of source will be the value after
> 
> "The"
> 
> > +		     address calculation. */
> 
> two spaces after .
> 
> > +		  if (OP_KIND(dst->opcode) != O_CMP &&
> > +		      OP_KIND(dst->src.type) == OP_REG &&
> > +		      (dst->src.reg & 7) == dst->dst.reg) {
> > +		    switch (OP_KIND(dst->dst.type))
> > +		      {
> > +		      case OP_POSTDEC:
> > +			dst->src.type = X(OP_REG_DEC,
> > +					  OP_SIZE(dst->dst.type));
> 
> should put a space before the ( in all these
> -mike

OK.
I will fix.

Thanks.

-- 
Yosinori Sato