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From: Yao Qi <qiyaoltc@gmail.com>
To: Alan Hayward <Alan.Hayward@arm.com>
Cc: "gdb-patches\@sourceware.org" <gdb-patches@sourceware.org>,
Subject: Re: [PATCH 8/11] Add FRV_MAX_REGISTER_SIZE
Date: Tue, 11 Apr 2017 10:02:00 -0000	[thread overview]
Message-ID: <867f2rw9br.fsf@gmail.com> (raw)
In-Reply-To: <3B3BD949-1C9D-44FF-AB6A-03091ECA49D0@arm.com> (Alan Hayward's	message of "Tue, 4 Apr 2017 10:14:49 +0000")

Alan Hayward <Alan.Hayward@arm.com> writes:

> -  char zerobuf[MAX_REGISTER_SIZE];
> +  char zerobuf[FRV_MAX_REGISTER_SIZE];
>
> -  memset (zerobuf, 0, MAX_REGISTER_SIZE);
> +  memset (zerobuf, 0, FRV_MAX_REGISTER_SIZE);
>
>    /* gr0 always contains 0.  Also, the kernel passes the TBR value in
>       this slot.  */

The code here fills some gr registers with zeros,

  /* gr0 always contains 0.  Also, the kernel passes the TBR value in
     this slot.  */
  regcache_raw_supply (regcache, first_gpr_regnum, zerobuf);

  /* Fill gr32, ..., gr63 with zeros. */
  for (regi = first_gpr_regnum + 32; regi <= last_gpr_regnum; regi++)
    regcache_raw_supply (regcache, regi, zerobuf);

the size of these gr registers are know, 8 bytes.  It won't be changed.
We can do,

 gdb_byte zerobuf[8] = { 0 };

the code is still easy to read.  If you really dislike magic number (IMO, 8
is not a magic number in this context), you can define FRR_GR_REGISTER_SIZE.

Alternatively, you can add a new regache api, regcache_raw_supply_zero.
Many places can use this api, and some uses of MAX_REGISTER_SIZE can be
removed too, for example,

  regcache_raw_supply (regcache, MIPS_ZERO_REGNUM, zerobuf);

-- 
Yao (齐尧)


  reply	other threads:[~2017-04-11 10:02 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-04 10:14 Alan Hayward
2017-04-11 10:02 ` Yao Qi [this message]
     [not found]   ` <EBF2EEFF-20D5-43F3-B35D-5BB37C3CB153@arm.com>
2017-04-27  8:55     ` Alan Hayward
2017-05-03  8:44       ` Yao Qi
2017-05-03  9:27         ` Pedro Alves
     [not found]           ` <CE496FA1-0D8A-47DC-B8E5-91598F30C93E@arm.com>
2017-05-03 11:23             ` Pedro Alves
2017-05-03 11:36               ` Alan Hayward
2017-05-03 13:34             ` Yao Qi

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