Re: RFC: Support target specific qSupported

["H.J. Lu" <hjl.tools@gmail.com>]

On Wed, Feb 3, 2010 at 6:14 AM, Tristan Gingold <gingold@adacore.com> wrote:
>
> On Feb 3, 2010, at 3:05 PM, H.J. Lu wrote:
>
>> On Wed, Feb 3, 2010 at 5:58 AM, Daniel Jacobowitz <dan@codesourcery.com> wrote:
>>> On Tue, Feb 02, 2010 at 08:03:39PM -0800, H.J. Lu wrote:
>>>> Hi,
>>>>
>>>> Intel AVX has 256bit YMM registers. XMM registers from SSE are the
>>>> aliases of the lower 128bit YMM registers. gdbserver on AVX machine
>>>> may use 256bit vector registers, instead of 128bit vector registers,
>>>> in the g/G packet.  When gdb talks to gdbserver, they need to negotiate
>>>> to find out the maxium common register size supported by both gdb and
>>>> gdbserver. I added `x86:xstate=BYTES:xcr0=VALUE' to qSupported:
>>>
>>> Have you seen the Target Descriptions chapter in the manual?  This is
>>> exactly what it was designed to do.
>>>
>>
>> Which gdb target does similar things I need for AVX?
>
> I think that powerpc does.  Its general purpose registers may be 32 bits wide (standard powerpc) or
> 64 bits (either powerpc64 or spe variants).
>

That is a little different since they have 2 ISAs, 32bit and 64bit. On x86,
both 32bit and 64bit ISAs may have either 128bit SSE or 256bit AVX.
Registers like mxcsr, MMX and SSE may not be available for all 32bit
processors. rs6000 uses

./features/rs6000
./regformats/rs6000

Maybe I should do something similar for x86.

Thanks.


-- 
H.J.