From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 16898 invoked by alias); 3 Feb 2010 14:26:49 -0000 Received: (qmail 16886 invoked by uid 22791); 3 Feb 2010 14:26:48 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL,BAYES_00,SARE_MSGID_LONG40,SARE_SUB_OBFU_Q1,SPF_PASS X-Spam-Check-By: sourceware.org Received: from mail-ew0-f211.google.com (HELO mail-ew0-f211.google.com) (209.85.219.211) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 03 Feb 2010 14:26:44 +0000 Received: by ewy3 with SMTP id 3so1355368ewy.13 for ; Wed, 03 Feb 2010 06:26:41 -0800 (PST) MIME-Version: 1.0 Received: by 10.216.89.194 with SMTP id c44mr3434298wef.199.1265207201185; Wed, 03 Feb 2010 06:26:41 -0800 (PST) In-Reply-To: <3935C6B4-A54C-40B6-9DF4-7FEDC4743346@adacore.com> References: <20100203040339.GA24984@lucon.org> <20100203135848.GA27938@caradoc.them.org> <6dc9ffc81002030605k6eadda3me45828f7c8c6a362@mail.gmail.com> <3935C6B4-A54C-40B6-9DF4-7FEDC4743346@adacore.com> Date: Wed, 03 Feb 2010 14:26:00 -0000 Message-ID: <6dc9ffc81002030626p54aac141pa8ee85adb1ed4c91@mail.gmail.com> Subject: Re: RFC: Support target specific qSupported From: "H.J. Lu" To: Tristan Gingold Cc: GDB Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2010-02/txt/msg00071.txt.bz2 On Wed, Feb 3, 2010 at 6:14 AM, Tristan Gingold wrote: > > On Feb 3, 2010, at 3:05 PM, H.J. Lu wrote: > >> On Wed, Feb 3, 2010 at 5:58 AM, Daniel Jacobowitz = wrote: >>> On Tue, Feb 02, 2010 at 08:03:39PM -0800, H.J. Lu wrote: >>>> Hi, >>>> >>>> Intel AVX has 256bit YMM registers. XMM registers from SSE are the >>>> aliases of the lower 128bit YMM registers. gdbserver on AVX machine >>>> may use 256bit vector registers, instead of 128bit vector registers, >>>> in the g/G packet. =A0When gdb talks to gdbserver, they need to negoti= ate >>>> to find out the maxium common register size supported by both gdb and >>>> gdbserver. I added `x86:xstate=3DBYTES:xcr0=3DVALUE' to qSupported: >>> >>> Have you seen the Target Descriptions chapter in the manual? =A0This is >>> exactly what it was designed to do. >>> >> >> Which gdb target does similar things I need for AVX? > > I think that powerpc does. =A0Its general purpose registers may be 32 bit= s wide (standard powerpc) or > 64 bits (either powerpc64 or spe variants). > That is a little different since they have 2 ISAs, 32bit and 64bit. On x86, both 32bit and 64bit ISAs may have either 128bit SSE or 256bit AVX. Registers like mxcsr, MMX and SSE may not be available for all 32bit processors. rs6000 uses ./features/rs6000 ./regformats/rs6000 Maybe I should do something similar for x86. Thanks. --=20 H.J.