* yet another doc tipo
@ 1999-04-01 0:00 J.T. Conklin
1999-02-23 16:29 ` J.T. Conklin
0 siblings, 1 reply; 2+ messages in thread
From: J.T. Conklin @ 1999-04-01 0:00 UTC (permalink / raw)
To: gdb-patches
Index: remote.texi
===================================================================
RCS file: /usr/rback/release/tools-src/gdb/gdb/doc/remote.texi,v
retrieving revision 1.3
diff -c -r1.3 remote.texi
*** remote.texi 1999/02/15 21:34:00 1.3
--- remote.texi 1999/02/23 23:52:09
***************
*** 221,227 ****
For the 386, @var{exception_address} should be installed as an interrupt
gate so that interrupts are masked while the handler runs. The gate
should be at privilege level 0 (the most privileged level). The
! @sc{sparc} and 68k stubs are able to mask interrup themselves without
help from @code{exceptionHandler}.
@item void flush_i_cache()
--- 221,227 ----
For the 386, @var{exception_address} should be installed as an interrupt
gate so that interrupts are masked while the handler runs. The gate
should be at privilege level 0 (the most privileged level). The
! @sc{sparc} and 68k stubs are able to mask interrupts themselves without
help from @code{exceptionHandler}.
@item void flush_i_cache()
--
J.T. Conklin
RedBack Networks
^ permalink raw reply [flat|nested] 2+ messages in thread* yet another doc tipo
1999-04-01 0:00 yet another doc tipo J.T. Conklin
@ 1999-02-23 16:29 ` J.T. Conklin
0 siblings, 0 replies; 2+ messages in thread
From: J.T. Conklin @ 1999-02-23 16:29 UTC (permalink / raw)
To: gdb-patches
Index: remote.texi
===================================================================
RCS file: /usr/rback/release/tools-src/gdb/gdb/doc/remote.texi,v
retrieving revision 1.3
diff -c -r1.3 remote.texi
*** remote.texi 1999/02/15 21:34:00 1.3
--- remote.texi 1999/02/23 23:52:09
***************
*** 221,227 ****
For the 386, @var{exception_address} should be installed as an interrupt
gate so that interrupts are masked while the handler runs. The gate
should be at privilege level 0 (the most privileged level). The
! @sc{sparc} and 68k stubs are able to mask interrup themselves without
help from @code{exceptionHandler}.
@item void flush_i_cache()
--- 221,227 ----
For the 386, @var{exception_address} should be installed as an interrupt
gate so that interrupts are masked while the handler runs. The gate
should be at privilege level 0 (the most privileged level). The
! @sc{sparc} and 68k stubs are able to mask interrupts themselves without
help from @code{exceptionHandler}.
@item void flush_i_cache()
--
J.T. Conklin
RedBack Networks
^ permalink raw reply [flat|nested] 2+ messages in thread
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