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From: Walfred Tedeschi <walfred.tedeschi@intel.com>
To: Pedro Alves <palves@redhat.com>, Yao Qi <qiyaoltc@gmail.com>
Cc: Joel Brobecker <brobecker@adacore.com>,
	gdb-patches <gdb-patches@sourceware.org>
Subject: Re: [PATCH V2 0/2] Split tdesc_(amd64|i386)_mpx into tdesc(amd64|i386)_mpx_* and tdesc(amd64|i386)_avx_mpx_*
Date: Thu, 14 Apr 2016 12:21:00 -0000	[thread overview]
Message-ID: <570F8B36.1070301@intel.com> (raw)
In-Reply-To: <570F8019.3060101@redhat.com>

Am 4/14/2016 um 1:33 PM schrieb Pedro Alves:
> On 04/14/2016 11:29 AM, Yao Qi wrote:
>> Walfred Tedeschi <walfred.tedeschi@intel.com> writes:
>>
>>> CPU features can occur in any combination. The current assumption that
>>> feature "A" implies in feature "B" does not necessarily hold.
>>>
>>> This patch series construct an additional combination of the Intel(R)
>>> Memory Protection Extensions (MPX) with Intel(R) Advanced Vector
>>> Extensions (AVX).
>>
>> First of all, I am not against your patches.  Just think a little more
>> after reading them...
>>
>> This reveals a problem in gdb target description.  It doesn't scale very
>> well if processors have multiple different features, and features can be
>> combined differently.  A processor family has three features A, B, and
>> C, and each processor implementation may have one, two or three of these
>> features.  In gdb target description, we need to have many *.xml and *.c
>> files, for these combinations like, A, B, C, AB, AC, BC, and ABC.
>>
>> The root cause is that target description are static and pre-generated.
>> If the target description can be generated dynamically according to the
>> cpuid or AT_HWCAP, that would be simpler.  In this way, we only have to
>> define target descriptions for feature A, B, and C, and GDB/GDBserver
>> combine them together in the runtime.
>
> I agree.  This is not the first time this is suggested.  If someone were
> to do it, I'd be in favor too.
>
> Thanks,
> Pedro Alves
>
Hello all,

Firstly we also agree! :)
We have to agree upon a strategy and a design for that.

I would propose that we go in the way it is by now for the patches that 
are under review for me and Michael. Those patches impact technology 
that is already public.

Together with that we discuss the design on how to stich the target 
descriptions together.

Would you agree with that?

In terms of the design:
During this time we also proved that it would be possible to have a 
single target description and selecting the features to be added 
according to the feature bits during run time.

The elegant option is of course the composition of the target 
description under run time. But there is also the consideration of how 
complex it would be.

Have you already had some thoughts about that? Can you point us to some 
discussion about the topic?


Thanks a lot for the reviews and thoughts and best regards,
-Fred

Intel Deutschland GmbH
Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany
Tel: +49 89 99 8853-0, www.intel.de
Managing Directors: Christin Eisenschmid, Christian Lamprechter
Chairperson of the Supervisory Board: Nicole Lau
Registered Office: Munich
Commercial Register: Amtsgericht Muenchen HRB 186928


  reply	other threads:[~2016-04-14 12:21 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-03 17:26 Walfred Tedeschi
2016-03-03 17:25 ` [PATCH V2 2/2] Re-factor (i386|amd64)mpx target descriptors Walfred Tedeschi
2016-04-13 12:05   ` Pedro Alves
2016-03-03 17:26 ` [PATCH V2 1/2] Add redundant target descriptor for tdesc(amd64|i386)_avx_mpx_* Walfred Tedeschi
2016-04-13 12:05   ` Pedro Alves
2016-04-13 12:18     ` Walfred Tedeschi
2016-04-14 10:00     ` Walfred Tedeschi
2016-04-14 10:29 ` [PATCH V2 0/2] Split tdesc_(amd64|i386)_mpx into tdesc(amd64|i386)_mpx_* and tdesc(amd64|i386)_avx_mpx_* Yao Qi
2016-04-14 11:33   ` Pedro Alves
2016-04-14 12:21     ` Walfred Tedeschi [this message]
2016-04-14 13:28       ` Build xml target descriptions at run time Pedro Alves

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