From: Pedro Alves <palves@redhat.com>
To: "Sivanupandi, Pitchumani" <Pitchumani.Sivanupandi@atmel.com>,
"troth@openavr.org" <troth@openavr.org>,
"brobecker@adacore.com" <brobecker@adacore.com>,
"gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
Subject: Re: [patch] Enable dwarf unwind for AVR target
Date: Mon, 04 Jan 2016 13:57:00 -0000 [thread overview]
Message-ID: <568A7A4F.2060504@redhat.com> (raw)
In-Reply-To: <CAC140656783604CABA6AE60C2A6D5A4CA3B38C1@penmbx02.corp.atmel.com>
On 01/04/2016 08:01 AM, Sivanupandi, Pitchumani wrote:
> - AVR_NUM_PSEUDO_REGS = 1,
> + AVR_DWARF2_PC_REGNUM = 36 /*LR*/,
It's hard to comment without some explanation for the design choices
in the patch, and/or some understanding of what this register is.
Seems odd that you create the register and then avr_pseudo_register_read
already returns <unavailable>? Why did you need to add it? Is this a
real machine register? What's LR?
> + AVR_NUM_PSEUDO_REGS = 2,
>
> AVR_PC_REG_INDEX = 35, /* index into array of registers */
>
> @@ -211,7 +213,7 @@ avr_register_name (struct gdbarch *gdbarch, int regnum)
> "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
> "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
> "SREG", "SP", "PC2",
> - "pc"
> + "pc", "LR"
> };
Thanks,
Pedro Alves
next prev parent reply other threads:[~2016-01-04 13:57 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-04 8:01 Sivanupandi, Pitchumani
2016-01-04 13:57 ` Pedro Alves [this message]
2016-01-05 6:45 ` Sivanupandi, Pitchumani
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