From: Jiri Gaisler <jiri@gaisler.se>
To: gdb-patches@sourceware.org
Subject: Re: [PATCH v2 10/22] sim/erc32: Switched emulated memory to host endian order.
Date: Sun, 22 Feb 2015 23:10:00 -0000 [thread overview]
Message-ID: <54EA61F2.6080303@gaisler.se> (raw)
In-Reply-To: <20150222205132.GA31422@vapier>
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On 02/22/2015 09:51 PM, Mike Frysinger wrote:
> On 19 Feb 2015 23:31, Jiri Gaisler wrote:
>> + *((unsigned short *) &(mem[waddr])) = *data & 0x0ffff;
>
> this violates strict aliasing. you can't cast the RHS side like this. it also
> violates alignment since the buffer is passed in as unsigned char *.
I don't fully agree on this. *mem holds the pointer to romb or ramb,
which are defined as unsigned char arrays. However, their definition is
is preceded with an integer define:
static uint32 mem_blockprot; /* RAM block write protection enabled */
static unsigned char romb[ROM_SZ];
static unsigned char ramb[RAM_END - RAM_START];
This means that romb and ramb are aligned on a 4-byte boundary
on systems where this matters (SPARC, ARM). When casting to short,
waddr is always aligned on 2, when casting to integer waddr is
always aligned on 4. So the casting really works without getting
an alignment error. Can I rather document this instead of using
a slower memcpy()? In cpu simulation, performance is essential and
every (host) instruction counts.
>
> you should use memcpy() instead. on systems where unaligned access are OK, gcc
> should optimize it down to a few load/stores anyways.
memcpy() does have some overhead compared to a single store ...
Jiri.
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next prev parent reply other threads:[~2015-02-22 23:10 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-19 22:32 [PATCH v2 00/22] Update of the SPARC SIS simulator Jiri Gaisler
2015-02-19 22:32 ` [PATCH v2 06/22] sim/erc32: Fix incorrect simulator performance report Jiri Gaisler
2015-02-22 4:29 ` Mike Frysinger
2015-02-19 22:32 ` [PATCH v2 05/22] sim/erc32: Remove unused defines in Makefile and switch off statistics Jiri Gaisler
2015-02-22 4:24 ` Mike Frysinger
2015-02-19 22:32 ` [PATCH v2 22/22] Add watchpoint support to gdb simulator interface Jiri Gaisler
2015-02-19 22:32 ` [PATCH v2 12/22] sim/erc32: Use memory_iread() function for instruction fetching Jiri Gaisler
2015-02-22 20:54 ` Mike Frysinger
2015-02-19 22:32 ` [PATCH v2 19/22] sim/erc32: Add support for LEON2 processor emulation Jiri Gaisler
2015-02-22 21:06 ` Mike Frysinger
2015-02-19 22:32 ` [PATCH v2 02/22] sim/erc32: Corrected wrong CPU implementation and version ID in psr Jiri Gaisler
2015-02-22 4:15 ` Mike Frysinger
2015-02-19 22:32 ` [PATCH v2 21/22] sim/erc32: Add data watchpoint support Jiri Gaisler
2015-02-19 22:32 ` [PATCH v2 01/22] sim/erc32: Disassembly in stand-alone mode did not work Jiri Gaisler
2015-02-22 4:10 ` Mike Frysinger
2015-02-19 22:32 ` [PATCH v2 16/22] sim/erc32: Use readline.h for readline types and functions Jiri Gaisler
2015-02-22 20:58 ` Mike Frysinger
2015-02-19 22:32 ` [PATCH v2 20/22] sim/erc32: Updated documentation Jiri Gaisler
2015-02-19 22:32 ` [PATCH v2 14/22] sim/erc32: Use gdb callback for UART I/O when linked with gdb Jiri Gaisler
2015-02-22 21:02 ` Mike Frysinger
2015-02-19 22:32 ` [PATCH v2 17/22] sim/erc32: Move local extern declarations into sis.h Jiri Gaisler
2015-02-22 20:59 ` Mike Frysinger
2015-02-19 22:32 ` [PATCH v2 11/22] sim/erc32: use SIM_AC_OPTION_HOSTENDIAN to probe for host endianess Jiri Gaisler
2015-02-22 20:52 ` Mike Frysinger
2015-02-19 22:33 ` [PATCH v2 07/22] sim/erc32: File loading via command line did not work Jiri Gaisler
2015-02-22 4:32 ` Mike Frysinger
2015-02-19 22:33 ` [PATCH v2 18/22] sim/erc32: Add support for LEON3 processor emulation Jiri Gaisler
2015-02-19 22:33 ` [PATCH v2 03/22] sim/erc32: Perform pseudo-init if binary linked to non-zero address Jiri Gaisler
2015-02-22 4:17 ` Mike Frysinger
2015-02-19 22:33 ` [PATCH v2 15/22] sim/erc32: Access memory subsystem through struct memsys Jiri Gaisler
2015-02-22 21:01 ` Mike Frysinger
2015-02-19 22:33 ` [PATCH v2 10/22] sim/erc32: Switched emulated memory to host endian order Jiri Gaisler
2015-02-22 20:51 ` Mike Frysinger
2015-02-22 23:10 ` Jiri Gaisler [this message]
2015-02-23 19:39 ` Mike Frysinger
2015-02-19 22:33 ` [PATCH v2 04/22] sim/erc32: Use fenv.h for host FPU access Jiri Gaisler
2015-02-22 4:24 ` Mike Frysinger
2015-02-19 22:33 ` [PATCH v2 08/22] sim/erc32: Added -v command line switch for verbose output Jiri Gaisler
2015-02-22 4:34 ` Mike Frysinger
2015-02-19 22:33 ` [PATCH v2 09/22] sim/erc32: Removed type mismatch compiler warnings Jiri Gaisler
2015-02-22 4:43 ` Mike Frysinger
2015-02-19 22:33 ` [PATCH v2 13/22] sim/erc32: Fix a few " Jiri Gaisler
2015-02-22 20:56 ` Mike Frysinger
2015-02-21 19:29 ` [PATCH v2 00/22] Update of the SPARC SIS simulator Mike Frysinger
2015-02-21 20:26 ` Jiri Gaisler
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