[PATCH] SH simulator illegal instructions

[Andrew STUBBS <andrew.stubbs@st.com>]

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Hi,

The SH simulator currently accepts some instructions in delay slots that 
should not be allowed.

Specifically:
	mov.l @(<disp>,PC),<REG_N>
	mov.w @(<disp>,PC),<REG_N>
	mova @(<disp>,PC),R0

I have checked the remaining SH-4 instructions, and don't believe there 
are any more, however I have not checked other architecture variants.

The attached patch add the proper check.

:ADDPATCH sh sim:

Andrew Stubbs

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2007-09-24  Andrew Stubbs  <andrew.stubbs@st.com>

	* gencode.c (tab): Add RAISE_EXCEPTION_IF_IN_DELAY_SLOT to the
	definition of PC relative 'mov.l'/'mov.w' and also 'mova'.

--- orig/sim/sh/gencode.c	2007-03-06 13:58:46.000000000 +0000
+++ src/sim/sh/gencode.c	2007-09-24 15:02:18.000000000 +0100
@@ -993,6 +993,7 @@
     "L (0);",
   },
   { "n", "", "mov.l @(<disp>,PC),<REG_N>", "1101nnnni8p4....",
+    "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
     "MA (1);",
     "R[n] = RLAT ((PH2T (PC) & ~3) + 4 + i);",
     "L (n);",
@@ -1059,6 +1060,7 @@
     "L (0);",
   },
   { "n", "", "mov.w @(<disp>,PC),<REG_N>", "1001nnnni8p2....",
+    "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
     "MA (1);",
     "R[n] = RSWAT (PH2T (PC + 4 + i));",
     "L (n);",
@@ -1120,6 +1122,7 @@
   },
 
   { "0", "", "mova @(<disp>,PC),R0", "11000111i8p4....",
+    "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
     "R0 = ((i + 4 + PH2T (PC)) & ~0x3);",
   },