* RFA: Allow set/display of e500 accumulator and status registers.
@ 2002-11-22 10:46 Nick Clifton
2002-12-18 14:46 ` Andrew Cagney
0 siblings, 1 reply; 5+ messages in thread
From: Nick Clifton @ 2002-11-22 10:46 UTC (permalink / raw)
To: gdb-patches
Hi Guys,
May I apply the following patch developed by Andrew Cagney to allow
the accumulator and status registers of the PowerPC e500 core to be
displayed and edited ? Applying the patch produces no new failures
in the gdb testsuite for the powerpc-eabispe target.
Cheers
Nick
2002-11-22 Andrew Cagney <cagney@redhat.com>
* rs6000-tdep.c: Include "gdb_assert.h".
(registers_e500): Add "acc" and "spefscr".
(PPC_GPRS_PSEUDO_REGS): Remove trailing comma.
(rs6000_gdbarch_init): Update initialization of ppc_gp0_regnum,
ppc_gplast_regnum, sp_regnum and fp_regnum. Check that gp0_regnum
really is "r0".
Index: gdb/rs6000-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/rs6000-tdep.c,v
retrieving revision 1.93
diff -c -3 -p -w -r1.93 rs6000-tdep.c
*** gdb/rs6000-tdep.c 18 Nov 2002 22:19:29 -0000 1.93
--- gdb/rs6000-tdep.c 22 Nov 2002 18:42:18 -0000
***************
*** 46,51 ****
--- 46,53 ----
#include "solib-svr4.h"
#include "ppc-tdep.h"
+ #include "gdb_assert.h"
+
/* If the kernel has to deliver a signal, it pushes a sigcontext
structure on the stack and then calls the signal handler, passing
the address of the sigcontext in an argument register. Usually
*************** rs6000_convert_from_func_ptr_addr (CORE_
*** 2268,2274 ****
/* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
/* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
/* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
! /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31), \
/* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
user-level SPR's. */
--- 2270,2276 ----
/* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
/* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
/* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
! /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
/* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
user-level SPR's. */
*************** static const struct reg registers_e500[]
*** 2447,2452 ****
--- 2449,2457 ----
PPC_UISA_NOFP_SPRS,
/* 7...38 */
PPC_EV_REGS,
+ R(acc), R(spefscr),
+ /* NOTE: Add new registers here the end of the raw register
+ list and just before the first pseudo register. */
/* 39...70 */
PPC_GPRS_PSEUDO_REGS
};
*************** rs6000_gdbarch_init (struct gdbarch_info
*** 2803,2810 ****
tdep->ppc_ev31_regnum = -1;
break;
case bfd_mach_ppc_e500:
! tdep->ppc_gp0_regnum = 39;
! tdep->ppc_gplast_regnum = 70;
tdep->ppc_toc_regnum = -1;
tdep->ppc_ps_regnum = 1;
tdep->ppc_cr_regnum = 2;
--- 2808,2815 ----
tdep->ppc_ev31_regnum = -1;
break;
case bfd_mach_ppc_e500:
! tdep->ppc_gp0_regnum = 41;
! tdep->ppc_gplast_regnum = tdep->ppc_gp0_regnum + 32 - 1;
tdep->ppc_toc_regnum = -1;
tdep->ppc_ps_regnum = 1;
tdep->ppc_cr_regnum = 2;
*************** rs6000_gdbarch_init (struct gdbarch_info
*** 2814,2821 ****
tdep->ppc_ev0_regnum = 7;
tdep->ppc_ev31_regnum = 38;
set_gdbarch_pc_regnum (gdbarch, 0);
! set_gdbarch_sp_regnum (gdbarch, 40);
! set_gdbarch_fp_regnum (gdbarch, 40);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, e500_dwarf2_reg_to_regnum);
set_gdbarch_pseudo_register_read (gdbarch, e500_pseudo_register_read);
set_gdbarch_pseudo_register_write (gdbarch, e500_pseudo_register_write);
--- 2819,2826 ----
tdep->ppc_ev0_regnum = 7;
tdep->ppc_ev31_regnum = 38;
set_gdbarch_pc_regnum (gdbarch, 0);
! set_gdbarch_sp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1);
! set_gdbarch_fp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, e500_dwarf2_reg_to_regnum);
set_gdbarch_pseudo_register_read (gdbarch, e500_pseudo_register_read);
set_gdbarch_pseudo_register_write (gdbarch, e500_pseudo_register_write);
*************** rs6000_gdbarch_init (struct gdbarch_info
*** 2829,2834 ****
--- 2834,2842 ----
tdep->ppc_ev31_regnum = -1;
break;
}
+
+ /* Sanity check on registers. */
+ gdb_assert (strcmp (tdep->regs[tdep->ppc_gp0_regnum].name, "r0") == 0);
/* Set lr_frame_offset. */
if (wordsize == 8)
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: RFA: Allow set/display of e500 accumulator and status registers.
2002-11-22 10:46 RFA: Allow set/display of e500 accumulator and status registers Nick Clifton
@ 2002-12-18 14:46 ` Andrew Cagney
2003-02-19 0:12 ` Andrew Cagney
0 siblings, 1 reply; 5+ messages in thread
From: Andrew Cagney @ 2002-12-18 14:46 UTC (permalink / raw)
To: gdb-patches, Kevin Buettner; +Cc: Nick Clifton
[-- Attachment #1: Type: text/plain, Size: 128 bytes --]
FYI,
Attatched is an update to the patch to add "acc" and "spefscr"
registers. The "acc" wasn't the correct size.
ok?
Andrew
[-- Attachment #2: diffs --]
[-- Type: text/plain, Size: 2936 bytes --]
2002-12-18 Andrew Cagney <ac131313@redhat.com>
* rs6000-tdep.c: Include "gdb_assert.h".
(registers_e500): Add "acc" and "spefscr".
(PPC_GPRS_PSEUDO_REGS): Remove trailing comma.
(rs6000_gdbarch_init): Update initialization of ppc_gp0_regnum,
ppc_gplast_regnum, sp_regnum and fp_regnum. Check that gp0_regnum
really is "r0".
(registers_e500): Mark the "acc" as a 64 bit (from Jim Willson).
Index: rs6000-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/rs6000-tdep.c,v
retrieving revision 1.100
diff -u -r1.100 rs6000-tdep.c
--- rs6000-tdep.c 18 Dec 2002 15:23:22 -0000 1.100
+++ rs6000-tdep.c 18 Dec 2002 20:41:37 -0000
@@ -46,6 +46,8 @@
#include "solib-svr4.h"
#include "ppc-tdep.h"
+#include "gdb_assert.h"
+
/* If the kernel has to deliver a signal, it pushes a sigcontext
structure on the stack and then calls the signal handler, passing
the address of the sigcontext in an argument register. Usually
@@ -2281,7 +2283,7 @@
/* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
/* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
/* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
- /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31), \
+ /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
/* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
user-level SPR's. */
@@ -2460,6 +2462,9 @@
PPC_UISA_NOFP_SPRS,
/* 7...38 */
PPC_EV_REGS,
+ R8(acc), R(spefscr),
+ /* NOTE: Add new registers here the end of the raw register
+ list and just before the first pseudo register. */
/* 39...70 */
PPC_GPRS_PSEUDO_REGS
};
@@ -2816,8 +2821,8 @@
tdep->ppc_ev31_regnum = -1;
break;
case bfd_mach_ppc_e500:
- tdep->ppc_gp0_regnum = 39;
- tdep->ppc_gplast_regnum = 70;
+ tdep->ppc_gp0_regnum = 41;
+ tdep->ppc_gplast_regnum = tdep->ppc_gp0_regnum + 32 - 1;
tdep->ppc_toc_regnum = -1;
tdep->ppc_ps_regnum = 1;
tdep->ppc_cr_regnum = 2;
@@ -2827,8 +2832,8 @@
tdep->ppc_ev0_regnum = 7;
tdep->ppc_ev31_regnum = 38;
set_gdbarch_pc_regnum (gdbarch, 0);
- set_gdbarch_sp_regnum (gdbarch, 40);
- set_gdbarch_fp_regnum (gdbarch, 40);
+ set_gdbarch_sp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1);
+ set_gdbarch_fp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, e500_dwarf2_reg_to_regnum);
set_gdbarch_pseudo_register_read (gdbarch, e500_pseudo_register_read);
set_gdbarch_pseudo_register_write (gdbarch, e500_pseudo_register_write);
@@ -2842,6 +2847,9 @@
tdep->ppc_ev31_regnum = -1;
break;
}
+
+ /* Sanity check on registers. */
+ gdb_assert (strcmp (tdep->regs[tdep->ppc_gp0_regnum].name, "r0") == 0);
/* Set lr_frame_offset. */
if (wordsize == 8)
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: RFA: Allow set/display of e500 accumulator and status registers.
2002-12-18 14:46 ` Andrew Cagney
@ 2003-02-19 0:12 ` Andrew Cagney
2003-02-19 18:31 ` Kevin Buettner
0 siblings, 1 reply; 5+ messages in thread
From: Andrew Cagney @ 2003-02-19 0:12 UTC (permalink / raw)
To: Andrew Cagney; +Cc: gdb-patches, Kevin Buettner, Nick Clifton
[-- Attachment #1: Type: text/plain, Size: 7 bytes --]
Kevin?
[-- Attachment #2: mailbox-message://ac131313@movemail/fsf/gdb/patches#31187198 --]
[-- Type: message/rfc822, Size: 6307 bytes --]
[-- Attachment #2.1.1: Type: text/plain, Size: 128 bytes --]
FYI,
Attatched is an update to the patch to add "acc" and "spefscr"
registers. The "acc" wasn't the correct size.
ok?
Andrew
[-- Attachment #2.1.2: diffs --]
[-- Type: text/plain, Size: 2936 bytes --]
2002-12-18 Andrew Cagney <ac131313@redhat.com>
* rs6000-tdep.c: Include "gdb_assert.h".
(registers_e500): Add "acc" and "spefscr".
(PPC_GPRS_PSEUDO_REGS): Remove trailing comma.
(rs6000_gdbarch_init): Update initialization of ppc_gp0_regnum,
ppc_gplast_regnum, sp_regnum and fp_regnum. Check that gp0_regnum
really is "r0".
(registers_e500): Mark the "acc" as a 64 bit (from Jim Willson).
Index: rs6000-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/rs6000-tdep.c,v
retrieving revision 1.100
diff -u -r1.100 rs6000-tdep.c
--- rs6000-tdep.c 18 Dec 2002 15:23:22 -0000 1.100
+++ rs6000-tdep.c 18 Dec 2002 20:41:37 -0000
@@ -46,6 +46,8 @@
#include "solib-svr4.h"
#include "ppc-tdep.h"
+#include "gdb_assert.h"
+
/* If the kernel has to deliver a signal, it pushes a sigcontext
structure on the stack and then calls the signal handler, passing
the address of the sigcontext in an argument register. Usually
@@ -2281,7 +2283,7 @@
/* 0 */ P(r0), P(r1), P(r2), P(r3), P(r4), P(r5), P(r6), P(r7), \
/* 8 */ P(r8), P(r9), P(r10),P(r11),P(r12),P(r13),P(r14),P(r15), \
/* 16 */ P(r16),P(r17),P(r18),P(r19),P(r20),P(r21),P(r22),P(r23), \
- /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31), \
+ /* 24 */ P(r24),P(r25),P(r26),P(r27),P(r28),P(r29),P(r30),P(r31)
/* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
user-level SPR's. */
@@ -2460,6 +2462,9 @@
PPC_UISA_NOFP_SPRS,
/* 7...38 */
PPC_EV_REGS,
+ R8(acc), R(spefscr),
+ /* NOTE: Add new registers here the end of the raw register
+ list and just before the first pseudo register. */
/* 39...70 */
PPC_GPRS_PSEUDO_REGS
};
@@ -2816,8 +2821,8 @@
tdep->ppc_ev31_regnum = -1;
break;
case bfd_mach_ppc_e500:
- tdep->ppc_gp0_regnum = 39;
- tdep->ppc_gplast_regnum = 70;
+ tdep->ppc_gp0_regnum = 41;
+ tdep->ppc_gplast_regnum = tdep->ppc_gp0_regnum + 32 - 1;
tdep->ppc_toc_regnum = -1;
tdep->ppc_ps_regnum = 1;
tdep->ppc_cr_regnum = 2;
@@ -2827,8 +2832,8 @@
tdep->ppc_ev0_regnum = 7;
tdep->ppc_ev31_regnum = 38;
set_gdbarch_pc_regnum (gdbarch, 0);
- set_gdbarch_sp_regnum (gdbarch, 40);
- set_gdbarch_fp_regnum (gdbarch, 40);
+ set_gdbarch_sp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1);
+ set_gdbarch_fp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, e500_dwarf2_reg_to_regnum);
set_gdbarch_pseudo_register_read (gdbarch, e500_pseudo_register_read);
set_gdbarch_pseudo_register_write (gdbarch, e500_pseudo_register_write);
@@ -2842,6 +2847,9 @@
tdep->ppc_ev31_regnum = -1;
break;
}
+
+ /* Sanity check on registers. */
+ gdb_assert (strcmp (tdep->regs[tdep->ppc_gp0_regnum].name, "r0") == 0);
/* Set lr_frame_offset. */
if (wordsize == 8)
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: RFA: Allow set/display of e500 accumulator and status registers.
2003-02-19 0:12 ` Andrew Cagney
@ 2003-02-19 18:31 ` Kevin Buettner
2003-02-19 18:37 ` Andrew Cagney
0 siblings, 1 reply; 5+ messages in thread
From: Kevin Buettner @ 2003-02-19 18:31 UTC (permalink / raw)
To: Andrew Cagney; +Cc: gdb-patches, Kevin Buettner, Nick Clifton
On Feb 18, 7:17pm, Andrew Cagney wrote:
> 2002-12-18 Andrew Cagney <ac131313@redhat.com>
>
> * rs6000-tdep.c: Include "gdb_assert.h".
> (registers_e500): Add "acc" and "spefscr".
> (PPC_GPRS_PSEUDO_REGS): Remove trailing comma.
> (rs6000_gdbarch_init): Update initialization of ppc_gp0_regnum,
> ppc_gplast_regnum, sp_regnum and fp_regnum. Check that gp0_regnum
> really is "r0".
> (registers_e500): Mark the "acc" as a 64 bit (from Jim Willson).
Okay. (Sorry I missed it when it was first posted.)
Kevin
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: RFA: Allow set/display of e500 accumulator and status registers.
2003-02-19 18:31 ` Kevin Buettner
@ 2003-02-19 18:37 ` Andrew Cagney
0 siblings, 0 replies; 5+ messages in thread
From: Andrew Cagney @ 2003-02-19 18:37 UTC (permalink / raw)
To: Kevin Buettner; +Cc: gdb-patches, Nick Clifton
>
> Okay. (Sorry I missed it when it was first posted.)
It was sent to you three times! Committing.
Andrew
^ permalink raw reply [flat|nested] 5+ messages in thread
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2002-11-22 10:46 RFA: Allow set/display of e500 accumulator and status registers Nick Clifton
2002-12-18 14:46 ` Andrew Cagney
2003-02-19 0:12 ` Andrew Cagney
2003-02-19 18:31 ` Kevin Buettner
2003-02-19 18:37 ` Andrew Cagney
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