* ppc/sim multiline strings
@ 2002-05-30 8:04 DJ Delorie
2002-05-30 8:07 ` Andrew Cagney
0 siblings, 1 reply; 3+ messages in thread
From: DJ Delorie @ 2002-05-30 8:04 UTC (permalink / raw)
To: gdb-patches; +Cc: dj
This is needed to compile the PPC sim with the latest gcc.
2002-05-30 DJ Delorie <dj@redhat.com>
* lf.c (lf_print__gnu_copyleft): Convert multiline strings to
compatible format.
* gen-idecode.c (print_run_until_stop_body): Likewise.
* gen-model.c (gen_model_c): Likewise.
Index: sim/ppc/gen-idecode.c
===================================================================
RCS file: /cvs/src/src/sim/ppc/gen-idecode.c,v
retrieving revision 1.2
diff -p -3 -r1.2 sim/ppc/gen-idecode.c
*** sim/ppc/gen-idecode.c 14 Dec 2001 00:22:12 -0000 1.2
--- sim/ppc/gen-idecode.c 30 May 2002 14:55:12 -0000
*************** print_run_until_stop_body(lf *file,
*** 757,777 ****
if (!generate_smp) {
! lf_putstr(file, "
! /* CASE 1: NO SMP (with or with out instruction cache).
!
! In this case, we can take advantage of the fact that the current
! instruction address does not need to be returned to the cpu object
! after every execution of an instruction. Instead it only needs to
! be saved when either A. the main loop exits or B. A cpu-halt or
! cpu-restart call forces the loop to be re-enered. The later
! functions always save the current cpu instruction address.
!
! Two subcases also exist that with and that without an instruction
! cache.
!
! An additional complexity is the need to ensure that a 1:1 ratio
! is maintained between the execution of an instruction and the
incrementing of the simulation clock */");
lf_putstr(file, "\n");
--- 757,777 ----
if (!generate_smp) {
! lf_putstr(file, "\n\
! /* CASE 1: NO SMP (with or with out instruction cache).\n\
! \n\
! In this case, we can take advantage of the fact that the current\n\
! instruction address does not need to be returned to the cpu object\n\
! after every execution of an instruction. Instead it only needs to\n\
! be saved when either A. the main loop exits or B. A cpu-halt or\n\
! cpu-restart call forces the loop to be re-enered. The later\n\
! functions always save the current cpu instruction address.\n\
! \n\
! Two subcases also exist that with and that without an instruction\n\
! cache.\n\
! \n\
! An additional complexity is the need to ensure that a 1:1 ratio\n\
! is maintained between the execution of an instruction and the\n\
incrementing of the simulation clock */");
lf_putstr(file, "\n");
*************** print_run_until_stop_body(lf *file,
*** 867,878 ****
if (generate_smp) {
! lf_putstr(file, "
! /* CASE 2: SMP (With or without ICACHE)
!
! The complexity here comes from needing to correctly restart the
! system when it is aborted. In particular if cpu0 requests a
! restart, the next cpu is still cpu1. Cpu0 being restarted after
all the other CPU's and the event queue have been processed */");
lf_putstr(file, "\n");
--- 867,878 ----
if (generate_smp) {
! lf_putstr(file, "\n\
! /* CASE 2: SMP (With or without ICACHE)\n\
! \n\
! The complexity here comes from needing to correctly restart the\n\
! system when it is aborted. In particular if cpu0 requests a\n\
! restart, the next cpu is still cpu1. Cpu0 being restarted after\n\
all the other CPU's and the event queue have been processed */");
lf_putstr(file, "\n");
Index: sim/ppc/gen-model.c
===================================================================
RCS file: /cvs/src/src/sim/ppc/gen-model.c,v
retrieving revision 1.1.1.1
diff -p -3 -r1.1.1.1 sim/ppc/gen-model.c
*** sim/ppc/gen-model.c 16 Apr 1999 01:35:09 -0000 1.1.1.1
--- sim/ppc/gen-model.c 30 May 2002 14:55:12 -0000
*************** gen_model_c(insn_table *table, lf *file)
*** 377,383 ****
lf_printf(file, " }\n");
lf_printf(file, " }\n");
lf_printf(file, "\n");
! lf_printf(file, " error(\"Unknown model '%%s', Models which are known are:%%s\n\",\n");
lf_printf(file, " name,\n");
lf_printf(file, " \"");
for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
--- 377,383 ----
lf_printf(file, " }\n");
lf_printf(file, " }\n");
lf_printf(file, "\n");
! lf_printf(file, " error(\"Unknown model '%%s', Models which are known are:%%s\\n\",\n");
lf_printf(file, " name,\n");
lf_printf(file, " \"");
for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
Index: sim/ppc/lf.c
===================================================================
RCS file: /cvs/src/src/sim/ppc/lf.c,v
retrieving revision 1.1.1.1
diff -p -3 -r1.1.1.1 sim/ppc/lf.c
*** sim/ppc/lf.c 16 Apr 1999 01:35:11 -0000 1.1.1.1
--- sim/ppc/lf.c 30 May 2002 14:55:12 -0000
*************** lf_print__gnu_copyleft(lf *file)
*** 273,300 ****
switch (file->type) {
case lf_is_c:
case lf_is_h:
! nr += lf_printf(file, "\
! /* This file is part of the program psim.
!
! Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
!
! This program is free software; you can redistribute it and/or modify
! it under the terms of the GNU General Public License as published by
! the Free Software Foundation; either version 2 of the License, or
! (at your option) any later version.
!
! This program is distributed in the hope that it will be useful,
! but WITHOUT ANY WARRANTY; without even the implied warranty of
! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
! GNU General Public License for more details.
!
! You should have received a copy of the GNU General Public License
! along with this program; if not, write to the Free Software
! Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
!
! --
!
! This file was generated by the program %s */
", filter_filename(file->program));
break;
default:
--- 273,300 ----
switch (file->type) {
case lf_is_c:
case lf_is_h:
! nr += lf_printf(file, "\n\
! /* This file is part of the program psim.\n\
! \n\
! Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>\n\
! \n\
! This program is free software; you can redistribute it and/or modify\n\
! it under the terms of the GNU General Public License as published by\n\
! the Free Software Foundation; either version 2 of the License, or\n\
! (at your option) any later version.\n\
! \n\
! This program is distributed in the hope that it will be useful,\n\
! but WITHOUT ANY WARRANTY; without even the implied warranty of\n\
! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n\
! GNU General Public License for more details.\n\
! \n\
! You should have received a copy of the GNU General Public License\n\
! along with this program; if not, write to the Free Software\n\
! Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.\n\
! \n\
! --\n\
! \n\
! This file was generated by the program %s */\n\
", filter_filename(file->program));
break;
default:
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: ppc/sim multiline strings
2002-05-30 8:04 ppc/sim multiline strings DJ Delorie
@ 2002-05-30 8:07 ` Andrew Cagney
2002-05-30 11:04 ` DJ Delorie
0 siblings, 1 reply; 3+ messages in thread
From: Andrew Cagney @ 2002-05-30 8:07 UTC (permalink / raw)
To: DJ Delorie; +Cc: gdb-patches
Yes, thanks. If you find others, I think they are obvious :-)
Andrew
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: ppc/sim multiline strings
2002-05-30 8:07 ` Andrew Cagney
@ 2002-05-30 11:04 ` DJ Delorie
0 siblings, 0 replies; 3+ messages in thread
From: DJ Delorie @ 2002-05-30 11:04 UTC (permalink / raw)
To: ac131313; +Cc: gdb-patches
> Yes, thanks. If you find others, I think they are obvious :-)
Ok. I might not get to them, though, because I don't build all the
simulators.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2002-05-30 8:04 ppc/sim multiline strings DJ Delorie
2002-05-30 8:07 ` Andrew Cagney
2002-05-30 11:04 ` DJ Delorie
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