[PATCH] RISC-V: Use hardware single step when available

[PATCH] RISC-V: Use hardware single step when available

[Anton Blanchard]

If the target supports hardware single-stepping use it instead of
inserting software breakpoints. We continue to use software breakpoints
for stepping over LR/SC atomic sequences.
---
 gdb/riscv-tdep.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index 100a44cddf3..0413d7b1a35 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -4707,6 +4707,11 @@ riscv_software_single_step (struct regcache *regcache)
   if (!next_pcs.empty ())
     return next_pcs;
 
+  /* If the target supports hardware single-stepping, software
+     single-stepping is unnecessary.  */
+  if (target_can_do_single_step ())
+    return {};
+
   next_pc = riscv_next_pc (regcache, cur_pc);
 
   return {next_pc};
-- 
2.34.1