[PATCH v2 0/6] sim: Fix MIPS livelocks and add software interrupts

[Sebastian Huber <sebastian.huber@embedded-brains.de>]

The MIPS simulator cannot run an operating system on the jmr3904 board.
Three defects stop the client.  An event handler which deschedules an
overdue event trips an assertion.  A HI/LO hazard aborts the run loop
and the client resumes on the same instruction.  The reserved
instruction exception discards the handler address, so a client which
emulates rdhwr makes no progress.

The simulator also lacks the Cause.IP0 and Cause.IP1 software generated
interrupts of the MIPS Privileged Resource Architecture.  A client which
requests one gets no exception.  Patches 4 and 5 prepare the interrupt
delivery for patch 6.

Patches 1 to 3 are unchanged and carry their Approved-By tag.

Changes since v1:

- Patch 4 is new.  interrupt_event() tested Status.IE alone.  On a
  target with an exception level it delivered a watch interrupt while
  Status.EXL was set.  The simulator re-entered the exception handler
  from the vector and the handler lost its resume point.  The patch
  gathers the enable conditions in interrupts_enabled() and gives both
  places the same test.  The test covers Debug.DM, as the review asked.

- Patch 5 is new.  signal_exception() assigned the whole Cause register
  on every target except the R3900, which discarded the pending
  interrupt bits.  The handler of a software interrupt read Cause.IP as
  zero and could not tell the source.  The patch keeps the pending
  field.

- interrupt_requested() becomes software_interrupt_requested() and
  check_interrupts() becomes check_software_interrupts(), as the review
  asked.  The second function loses its static linkage, because the
  instruction descriptions call it.

- The call after the ERET emulation of decode_coproc() is gone.  No
  caller passes cp0_eret or cp0_deret to decode_coproc(), so both arms
  are dead code and the call never ran.  The live ERET emulation sits in
  mips.igen and micromips.igen, and the call goes there.

- The EI instruction of mips3264r2.igen sets Status.IE, so it calls
  check_software_interrupts() as well.

- cause_IPSW_mask and cause_IPSW_shift are gone.  The existing cause_SW0
  and cause_SW1 name the same two bits.  Status.IM and Cause.IP share
  bits 15:8, so the test needs no shift.  The new cause_IPALL_mask
  covers the whole pending field for patch 5.

The following points of the review stay open:

- DERET calls no check.  The micromips DERET body is empty and mips.igen
  has no DERET encoding, so the series has nothing to hook.

- Only the dead DERET arm clears Debug.DM.  After an sdbbp the new test
  blocks every interrupt for the rest of the run.

- interrupt_pending receives no non-zero value anywhere in the tree.  I
  leave it alone.

- ErrorEPC and Status.ERL keep their present state.

- The series carries no test.  sim/testsuite/mips installs no exception
  vector and has no linker script for one.

Sebastian Huber (6):
  sim: Allow an overdue event to be descheduled
  sim/mips: Do not abort on a HI/LO hazard
  sim/mips: Deliver the reserved instruction exception
  sim/mips: Check all interrupt enable conditions
  sim/mips: Keep the pending interrupts in Cause
  sim/mips: Recognise a software interrupt request

 sim/common/sim-events.c  |  6 ++-
 sim/mips/interp.c        | 86 +++++++++++++++++++++++++++++++++++++---
 sim/mips/micromips.igen  |  1 +
 sim/mips/mips.igen       | 26 +++++++++---
 sim/mips/mips3264r2.igen |  1 +
 sim/mips/sim-main.h      |  6 +++
 6 files changed, 113 insertions(+), 13 deletions(-)

-- 
2.51.0