From: Kevin Buettner <kevinb@redhat.com>
To: Milica Matic <milica.matic@htecgroup.com>
Cc: gdb-patches@sourceware.org,
Djordje Todorovic <Djordje.Todorovic@htecgroup.com>,
Milos Kalicanin <milos.kalicanin@htecgroup.com>,
"simark@simark.ca" <simark@simark.ca>,
"cfu@wavecomp.com" <cfu@wavecomp.com>,
"aburgess@redhat.com" <aburgess@redhat.com>,
"macro@orcam.me.uk" <macro@orcam.me.uk>
Subject: Re: [PATCH^10] gdb: mips: Add MIPSR6 support
Date: Thu, 6 Feb 2025 13:28:29 -0700 [thread overview]
Message-ID: <20250206132829.052fbbed@f41-zbm-amd> (raw)
In-Reply-To: <20250130175447.278009-1-milica.matic@htecgroup.com>
Hi Milica,
Looking much better, but still a few formatting nits. See below...
On Thu, 30 Jan 2025 17:54:59 +0000
Milica Matic <milica.matic@htecgroup.com> wrote:
> @@ -1668,20 +1791,30 @@ mips32_next_pc (struct regcache *regcache, CORE_ADDR pc)
> }
> }
> else if (op == 17 && itype_rs (inst) == 8)
> - /* BC1F, BC1FL, BC1T, BC1TL: 010001 01000 */
> - pc = mips32_bc1_pc (gdbarch, regcache, inst, pc + 4, 1);
> - else if (op == 17 && itype_rs (inst) == 9
> - && (itype_rt (inst) & 2) == 0)
> - /* BC1ANY2F, BC1ANY2T: 010001 01001 xxx0x */
> - pc = mips32_bc1_pc (gdbarch, regcache, inst, pc + 4, 2);
> - else if (op == 17 && itype_rs (inst) == 10
> - && (itype_rt (inst) & 2) == 0)
> - /* BC1ANY4F, BC1ANY4T: 010001 01010 xxx0x */
> - pc = mips32_bc1_pc (gdbarch, regcache, inst, pc + 4, 4);
> - else if (op == 29)
> - /* JALX: 011101 */
> - /* The new PC will be alternate mode. */
> {
> + /* BC1F, BC1FL, BC1T, BC1TL: 010001 01000 */
> + pc = mips32_bc1_pc (gdbarch, regcache, inst, pc + 4, 1);
> + }
> + else if (!is_mipsr6_isa (gdbarch)
> + && op == 17
> + && itype_rs (inst) == 9
> + && (itype_rt (inst) & 2) == 0)
The three '&&' lines above all need an extra space so that the first
'&' lines up underneath the '!' on the 'else if' line.
> + {
> + /* BC1ANY2F, BC1ANY2T: 010001 01001 xxx0x */
> + pc = mips32_bc1_pc (gdbarch, regcache, inst, pc + 4, 2);
> + }
> + else if (!is_mipsr6_isa (gdbarch)
> + && op == 17
> + && itype_rs (inst) == 10
> + && (itype_rt (inst) & 2) == 0)
Likewise.
Kevin
prev parent reply other threads:[~2025-02-06 20:29 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-30 17:54 Milica Matic
2025-02-06 20:28 ` Kevin Buettner [this message]
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