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Thu, 6 Feb 2025 20:28:37 +0000 (UTC) Received: from f41-zbm-amd (unknown [10.22.64.223]) by mx-prod-int-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 407B71954B00; Thu, 6 Feb 2025 20:28:34 +0000 (UTC) Date: Thu, 6 Feb 2025 13:28:29 -0700 From: Kevin Buettner To: Milica Matic Cc: gdb-patches@sourceware.org, Djordje Todorovic , Milos Kalicanin , "simark@simark.ca" , "cfu@wavecomp.com" , "aburgess@redhat.com" , "macro@orcam.me.uk" Subject: Re: [PATCH^10] gdb: mips: Add MIPSR6 support Message-ID: <20250206132829.052fbbed@f41-zbm-amd> In-Reply-To: <20250130175447.278009-1-milica.matic@htecgroup.com> References: <20250130175447.278009-1-milica.matic@htecgroup.com> Organization: Red Hat MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: hw0lbmpJitJ2hBuFFHWd7LTF3E33YXQoQ_chLoBgD1s_1738873718 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces~public-inbox=simark.ca@sourceware.org Hi Milica, Looking much better, but still a few formatting nits. See below... On Thu, 30 Jan 2025 17:54:59 +0000 Milica Matic wrote: > @@ -1668,20 +1791,30 @@ mips32_next_pc (struct regcache *regcache, CORE_ADDR pc) > } > } > else if (op == 17 && itype_rs (inst) == 8) > - /* BC1F, BC1FL, BC1T, BC1TL: 010001 01000 */ > - pc = mips32_bc1_pc (gdbarch, regcache, inst, pc + 4, 1); > - else if (op == 17 && itype_rs (inst) == 9 > - && (itype_rt (inst) & 2) == 0) > - /* BC1ANY2F, BC1ANY2T: 010001 01001 xxx0x */ > - pc = mips32_bc1_pc (gdbarch, regcache, inst, pc + 4, 2); > - else if (op == 17 && itype_rs (inst) == 10 > - && (itype_rt (inst) & 2) == 0) > - /* BC1ANY4F, BC1ANY4T: 010001 01010 xxx0x */ > - pc = mips32_bc1_pc (gdbarch, regcache, inst, pc + 4, 4); > - else if (op == 29) > - /* JALX: 011101 */ > - /* The new PC will be alternate mode. */ > { > + /* BC1F, BC1FL, BC1T, BC1TL: 010001 01000 */ > + pc = mips32_bc1_pc (gdbarch, regcache, inst, pc + 4, 1); > + } > + else if (!is_mipsr6_isa (gdbarch) > + && op == 17 > + && itype_rs (inst) == 9 > + && (itype_rt (inst) & 2) == 0) The three '&&' lines above all need an extra space so that the first '&' lines up underneath the '!' on the 'else if' line. > + { > + /* BC1ANY2F, BC1ANY2T: 010001 01001 xxx0x */ > + pc = mips32_bc1_pc (gdbarch, regcache, inst, pc + 4, 2); > + } > + else if (!is_mipsr6_isa (gdbarch) > + && op == 17 > + && itype_rs (inst) == 10 > + && (itype_rt (inst) & 2) == 0) Likewise. Kevin